Etched Jobs - Page 6
Open positions at Etched, newest first. Each listing links to the company's own application page.
- Open positions
- 129
Newest Etched openings
Network Security Engineer
On-siteSan Jose, CA (On-site) · 30 days ago
Etched's infrastructure spans some of the most sensitive compute environments in the industry: bare-metal HPC clusters running proprietary ASIC workloads, hybrid on-prem/cloud deployments…
- Full-time
- Mid-level
- Fortinet firewalls
- Arista EOS
- network security monitoring
San Jose, CA (On-site) · 30 days ago
We are seeking a Design Verification Engineer to join our Systems/Performance Verification team.
- Full-time
- Mid-level
- SystemVerilog
- ASIC design verification
- Python
Austin, TX (On-site) · 30 days ago
We are seeking a Design Verification Engineer to join our Interface IP DV team.
- Full-time
- Senior
- 5+ years
- UVM
- SystemVerilog
- PCIe
San Jose, CA (On-site) · 30 days ago
Etched is seeking a highly skilled and motivated ASIC Technical Program Manager to join our silicon team.
- Full-time
- Senior
- 5+ years
- ASIC tape-out
- RTL-to-GDSII flow
- EDA vendor management
San Jose, CA (On-site) · 30 days ago
Etched is building a new category of AI hardware: frontier inference clusters.
- Full-time
- Senior
- 5+ years
- RTL-to-GDSII flows
- PG mesh design
- PPA tuning
Lab Operations Intern
On-siteSan Jose, CA (On-site) · 30 days ago
Etched's lab keeps our hardware running 24/7.
- Per diem
- Entry level
- hardware testing
- rack cabling
- component rework
San Jose, CA (On-site) · 30 days ago
We are looking for a Head of Legal / General Counsel to lead and scale Etched’s legal function.
- Full-time
- Executive
- commercial negotiations
- corporate governance
- financings
Inference Software Engineer
On-siteSan Jose, CA (On-site) · 30 days ago
Support porting state-of-the-art models to our architecture.
- Full-time
- Mid-level
- C++
- Rust
- distributed systems
Formal Verification - DV
On-siteSan Jose, CA (On-site) · 30 days ago
We are seeking a Formal Verification Engineer to join our ASIC Design Verification team.
- Full-time
- Senior
- 5+ years
- formal verification
- SystemVerilog Assertions
- Cadence JasperGold
Head of Technical Accounting
On-siteSan Jose, CA (On-site) · 30 days ago
As our first hire on the technical accounting and financial reporting team, you will be a key architect behind some of our most critical accounting initiatives.
- Full-time
- Executive
- 10+ years
- ASC 606
- GAAP
- technical accounting memos
DFT Intern
On-siteSan Jose, CA (On-site) · 30 days ago
As a DFT Intern at Etched, you will help review and refine DFT flow automation to support chip-level regression on Caelius.
- Internship
- Entry level
- Verilog
- SystemVerilog
- ASIC design flow
Lab Technician (Contractor)
On-siteSan Jose, CA (On-site) · 30 days ago
We're looking for a hands-on Lab Technician to support our hardware development and validation efforts.
- Contract
- Mid-level
- hardware bring-up
- test fixture preparation
- data documentation
San Jose, CA (On-site) · 30 days ago
Building cutting-edge model-specific ASICs requires crafting custom infrastructure and toolchains to support ultra-fast, reliable, and scalable development across the stack - from…
- Full-time
- Director
- 8+ years
- systems programming
- distributed systems
- telemetry and observability (Prometheus, Grafana)
San Jose, CA (On-site) · 30 days ago
We're looking for a hands-on Electrical Engineering Technician to support our hardware development and validation efforts.
- Full-time
- Mid-level
- electrical test procedures
- oscilloscope
- test equipment calibration
Supercomputing Engineer, Fleet Software
Direct ATSSan Jose, CA · 30 days ago
Fleet Software enables deployments at scale through configuration management, safe software and firmware rollouts, and software recovery, while partnering with other engineering teams to…
DV Intern
On-siteSan Jose, CA (On-site) · 30 days ago
As a Design Verification intern, you will ensure the custom IPs powering our chips - including systolic arrays, DMA engines, and NoCs - are robust, high-performance, and silicon-ready.
- Part-time
- Entry level
- UVM
- SystemVerilog
- Python
Electrical Engineer, Hardware Systems
$150k – $275k/yrSan Jose, CA (On-site) · 30 days ago
Lead schematic design of the mezzanine card and base board for Etched’s accelerator systems
- Full-time
- Senior
- 5+ years
- PCB design
- schematic design
- PCIe Gen5
San Jose, CA (On-site) · 30 days ago
We are seeking an experienced Product Engineer to lead silicon validation, test program development, and productization for our large-format AI accelerator chips.
- Full-time
- Senior
- 5+ years
- silicon characterization
- yield optimization
- Fmax/Vmin characterization
San Jose, CA (On-site) · 30 days ago
Etched is seeking a Manufacturing Design Program Manager to drive technical manufacturing readiness across new product introduction and mass production for our transformer-specific AI…
- Full-time
- Lead / Staff
- 7+ years
- NPI
- DFM reviews
- EVT/DVT/PVT
San Jose, CA (On-site) · 30 days ago
We are seeking a Thermal Manufacturing Engineer to own the development, qualification, and scaling of thermal management manufacturing processes for Etched's silicon-to-system products.
- Full-time
- Senior
- 7+ years
- skiving
- vacuum brazing
- friction stir welding
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