Cisco Systems
Telecom & NetworksDirect Workday career site

ASIC Design Verification Engineer

Pay
$155,000 – $222,600 per year
Location
San Jose, CA · On-site
Job type
Full-time
Level
Mid-level
Experience
5+ years
Education
Bachelor's degree
Listed
20 days ago

Skills & highlights for this role

  • SystemVerilog
  • UVM
  • reusable testbench development
  • Perl or Python scripting

Also useful

  • P4
  • Veloce
  • Palladium
  • Zebu
  • HAPS
  • formal verification
  • PCIe
  • CXL

About the role

The application window is expected to close on: 12/17/2026

This is an onsite role based in San Jose, CA.

Meet the Team

The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We're a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Because full product development—from design to qualification to production—is within our team, we’re able to think differently, experiment more, and work quickly. Join us to power the future of the digital world.

Your Impact

  • As an ASIC Design Verification Engineer, you will play a critical role in developing Cisco’s revolutionary data center solutions.
  • You’ll architect and develop DV infrastructure, create and execute comprehensive test plans, and ensure robust verification and coverage for complex chips.
  • Your collaboration with designers, architects, and software teams will help guarantee seamless integration and optimal performance of Cisco’s hardware platforms.
  • You will:
  • Architect, develop, and maintain block, cluster, and top-level Design Verification (DV) environment infrastructure.
  • Build DV environments from scratch for block and cluster levels.
  • Develop, implement, and enhance test plans and tests for block and cluster verification, using both constraint-random and directed stimulus.
  • Ensure comprehensive verification coverage through code and functional coverage implementation and review.
  • Qualify RTL design by running Gate Level Simulations on netlists.
  • Collaborate with designers, architects, and software teams to debug issues during post-silicon bring-up and integration.
  • Support design testing in emulation environments.
  • Minimum Qualifications
  • Bachelors degree in Computer, Electrical or Electronics Engineering, + 5 years of relevant technical experience, or Masters degree in a related field + 3 years of relevant technical experience, focused on ASIC design and verification.
  • Experience in System Verilog or UVM methodology.
  • Experience building reusable and scalable test benches from scratch.
  • Experience with scripting using Perl and/or Python.

Preferred Qualifications

  • Experience with forwarding logic, parsers, or P4.
  • Experience using emulation platforms such as Veloce, Palladium, Zebu, or HAPS.
  • Knowledge of formal verification tools (e.g., IEV or VC Formal).
  • Domain knowledge in one or more protocols such as PCIe, CXL, Ethernet, RDMA, DDR, or TCP.

Why Cisco?

  • At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond.
  • We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds.
  • These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.
  • Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions.
  • Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless.
  • We work as a team, collaborating with empathy to make really big things happen on a global scale.
  • Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.

Pay and benefits

The starting salary range posted for this position is $155,000.00 to $222,600.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.

Individual pay is determined by the candidate's hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies: - 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees - 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco

  • Non-exempt employees receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
  • Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) - 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
  • Additional paid time away may be requested to deal with critical or emergency issues for family members
  • Optional 10 paid days per full calendar year to volunteer

For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows:

  • .75% of incentive target for each 1% of revenue attainment up to 50% of quota; - 1.5% of incentive target for each 1% of attainment between 50% and 75%; - 1% of incentive target for each 1% of attainment between 75% and 100%; and
  • Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

The applicable full salary ranges for this position, by specific state, are listed below:

Non-Metro New York state & Washington state: $138,100.00 - $227,900.00

  • For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined.
  • Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.
Read the original posting

From Cisco Systems's careers page, first listed on Rolev.ai on October 20, 2026. Rolev.ai is not the employer.

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Common questions

What is the salary for the ASIC Design Verification Engineer role at Cisco Systems?

The ASIC Design Verification Engineer posting at Cisco Systems states compensation of $155,000 – $222,600 per year. It is listed as a full-time position. Final pay may depend on location, experience, and interview evaluation on Cisco Systems's official career site.

Where is the ASIC Design Verification Engineer job at Cisco Systems located?

This ASIC Design Verification Engineer position at Cisco Systems is located in San Jose, CA (On-site). Always check Cisco Systems's application page for specific state eligibility or relocation policies.

What qualifications are required for ASIC Design Verification Engineer at Cisco Systems?

For the ASIC Design Verification Engineer role, Cisco Systems highlights 5+ years of relevant experience; a bachelor's degree; experience with SystemVerilog, UVM, reusable testbench development, Perl or Python scripting. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.

How do I apply for the ASIC Design Verification Engineer position at Cisco Systems?

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