Meta
Technology & SoftwareDirect employer career site

ASIC Engineer, Power

Pay
$114,000 – $172,000 per year
Location
Sunnyvale, CA · On-site
Job type
Full-time
Level
Senior
Experience
6+ years
Education
Bachelor's degree
Listed
29 days ago

Skills & highlights for this role

  • ASIC design
  • power analysis
  • UPF
  • Python
  • Tcl

Also useful

  • Synopsys PrimePower
  • Cadence Voltus
  • clock gating

About the role

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Meta is building custom silicon to power the infrastructure that underlies its family of products and services. As an ASIC Engineer specializing in power on the EDA Infrastructure team, you will develop and maintain power analysis and optimization flows that enable silicon engineers across the organization to accurately model, estimate, and reduce power consumption in custom ASIC designs. In this role, you will work at the intersection of EDA tooling, physical design, and power methodology, helping to define the infrastructure that shapes how Meta's next-generation chips are designed and verified.

Engineer, Power Responsibilities

  • Develop and maintain power analysis flows including dynamic and static power estimation, vectorless analysis, and power intent verification using industry-standard EDA tools
  • Define and implement power methodology guidelines for RTL, synthesis, and physical design stages of the ASIC development flow
  • Collaborate with RTL design, physical design, and verification teams to identify and resolve power hotspots and inefficiencies across custom ASIC designs
  • Build and optimize EDA infrastructure scripts and automation frameworks to improve power signoff accuracy and turnaround time
  • Evaluate and integrate commercial and internally developed EDA tools into the power analysis flow, providing technical assessments and recommendations
  • Develop power intent specifications using UPF or CPF and ensure consistent application across design and implementation stages
  • Establish power budgets and track power metrics across design milestones, communicating results and risks to cross-functional stakeholders
  • Drive continuous improvement of power closure methodologies by analyzing results across multiple tape-outs and identifying systemic opportunities
  • Provide technical guidance to other engineers on power analysis best practices, flow usage, and debug techniques
  • Partner with EDA tool vendors to evaluate new capabilities and influence tool roadmaps to meet Meta silicon design requirements

Minimum Qualifications

  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • 6+ years of experience in ASIC design or physical design with a focus on power analysis, power optimization, or power signoff
  • Experience developing or maintaining EDA flows for power analysis using tools such as Synopsys PrimePower, Cadence Voltus, or equivalent
  • Experience with power intent specification languages such as UPF or CPF and their application across RTL-to-GDSII flows
  • Experience scripting in Python, Tcl, or shell to build and automate EDA infrastructure workflows
  • Experience collaborating across RTL design, physical design, and verification disciplines to drive power closure on complex ASIC designs
  • Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta

Preferred Qualifications

  • Experience evaluating and qualifying new EDA tools or methodologies in a production silicon environment
  • Familiarity with custom or semi-custom design flows for high-performance computing or data center silicon
  • Experience with low-power design techniques including clock gating, power gating, multi-voltage domain design, and dynamic voltage and frequency scaling
  • Background in developing internal EDA infrastructure tooling or flow automation at scale across multiple concurrent design projects

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About Meta

Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology.

People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.

For those who live in or expect to work from California if hired for this position, please click here for additional information.

United States of America: $114,000/year to $172,000/year + bonus + equity + benefits

Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.

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Read the original posting

From Meta's careers page, first listed on Rolev.ai on October 12, 2026. Rolev.ai is not the employer.

How Rolev.ai helps with this application

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Common questions

What is the salary for the ASIC Engineer, Power role at Meta?

The ASIC Engineer, Power posting at Meta states compensation of $114,000 – $172,000 per year. It is listed as a full-time position. Final pay may depend on location, experience, and interview evaluation on Meta's official career site.

Where is the ASIC Engineer, Power job at Meta located?

This ASIC Engineer, Power position at Meta is located in Sunnyvale, CA (On-site). Always check Meta's application page for specific state eligibility or relocation policies.

What qualifications are required for ASIC Engineer, Power at Meta?

For the ASIC Engineer, Power role, Meta highlights 6+ years of relevant experience; a bachelor's degree; experience with ASIC design, power analysis, UPF, Python, Tcl. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.

How do I apply for the ASIC Engineer, Power position at Meta?

This listing links directly to Meta's application page. You can apply directly on Meta's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.