ASIC SOC Methodology Design Engineer, SI Hardware
- Location
- Austin, TX · On-site
- Job type
- Full-time
- Level
- Mid-level
- Listed
- 29 days ago
Skills & highlights for this role
- ASIC design
- SoC methodology
Asic Soc
- Methodology Design Engineer, SI Hardware | Tesla (Tesla SI)
- Location: Austin, Texas | Req ID: 266525 | Job Type: Full-time
- What to Expect
The Tesla SI Hardware team is at the forefront of revolutionizing artificial intelligence through cutting-edge hardware innovation. Comprising brilliant engineers and visionaries, the team designs and develops advanced SI inference chips tailored to accelerate Tesla’s machine learning capabilities.
A key part of this effort is Dojo, Tesla's custom supercomputer system built to efficiently train massive neural networks on vast video data from the fleet. The work of Tesla's SI Hardware team powers the neural networks behind Full Self-Driving (FSD), and Tesla humanoid robot, Optimus, pushing the boundaries of computational efficiency and performance.
By creating custom silicon and optimized architectures, the team ensures Tesla remains a leader in AI-driven automotive and energy solutions, shaping a future where intelligent machines enhance human life.
This role focuses on developing and owning the EDA methodology flows that enable SOC design signoff, spanning RTL integration, static verification, formal equivalence checking, and timing constraint development across a large multi-block SOC.
What You'll Do
- Own RTL‑to‑PD integration and Spyglass lint sign‑off flow, including filelist methodology, violation triage, and waiver creation
- Set up, run, and maintain Spyglass CDC sign‑off flows, configure DFx mode, triage violations, develop waivers, and drive fixes with design teams
- Define and maintain RTL‑to‑SDC timing‑constraint methodology across diverse IP blocks
- Manage Spyglass RDC sign‑off flows, perform reset‑domain analysis, triage violations, develop waivers, and introduce robust reset scenarios with verification teams
- Lead Conformal LEC formal equivalence checking (RTL‑to‑RTL, RTL‑to‑gate), debug failures, create constraints, and conduct sign‑off reviews
- Automate and enhance methodology flows using TCL and Python scripting
- Collaborate with RTL design, DFT, timing, and physical design groups to scale methodologies across the full SOC
What You'll Bring
- Degree in Electrical Engineering, Computer Engineering, or equivalent experience
- 2+ years of industry experience (including internships) working with digital design EDA tools
- Hands-on experience with one or more: Spyglass (CDC/lint/RDC), Conformal LEC, Formality, or equivalent
- Understanding of clock domain crossings, reset synchronization, and synthesis fundamentals
- Proficiency in TCL and/or Python scripting
- Familiarity with SDC constraint development
- Elementary understanding of DFx/DFT scan modes and their impact on CDC and constraints
- Experience with both Synopsys and Cadence EDA tool ecosystems
- Exposure to RTL filelist management and build systems at SOC scale
- Experience with physical design flows (synthesis, PnR, timing analysis)
Benefits
Along with competitive pay, as a full-time Tesla employee, you are eligible for the following benefits at day 1 of hire:
- Medical plans > plan options with $0 payroll deduction
- Family-building, fertility, adoption and surrogacy benefits
- Dental (including orthodontic coverage) and vision plans, both have options with a $0 paycheck contribution
- Company Paid (Health Savings Accounts) HSA Contribution when enrolled in the High-Deductible medical plan with HSA
- Healthcare and Dependent Care Flexible Spending Accounts (FSA)
- 401(k) with employer match, Employee Stock Purchase Plans, and other financial benefits
- Company paid Basic Life, AD&D
- Short-term and long-term disability insurance (90 day waiting period)
- Employee Assistance Program
- Sick and Vacation time (Flex time for salary positions, Accrued hours for Hourly positions), and Paid Holidays
- Back-up childcare and parenting support resources
- Voluntary benefits to include: critical illness, hospital indemnity, accident insurance, theft & legal services, and pet insurance
- Weight Loss and Tobacco Cessation Programs
- Tesla Babies program
- Commuter benefits
- Employee discounts and perks program
- Earned Wage Access: Real-time pay access paid daily, subject to eligibility and schedule (applicable for below Sr. Managers levels)
From Tesla's careers page, first listed on Rolev.ai on October 12, 2026. Rolev.ai is not the employer.
How Rolev.ai helps with this application
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Common questions
Where is the ASIC SOC Methodology Design Engineer, SI Hardware job at Tesla located?
This ASIC SOC Methodology Design Engineer, SI Hardware position at Tesla is located in Austin, TX (On-site). Always check Tesla's application page for specific state eligibility or relocation policies.
What qualifications are required for ASIC SOC Methodology Design Engineer, SI Hardware at Tesla?
For the ASIC SOC Methodology Design Engineer, SI Hardware role, Tesla highlights experience with ASIC design, SoC methodology. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the ASIC SOC Methodology Design Engineer, SI Hardware position at Tesla?
This listing links directly to Tesla's application page. You can apply directly on Tesla's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.