Chip Simulation Lead

Job Summary

We are looking for a Lead Chip Simulation Engineer to drive the technical direction and development of our custom AI accelerator simulation infrastructure.

Our chip simulation team builds the hardware models that enable software development, debugging, and hardware-software co-design before silicon is available.

In this role, you will guide engineers working on our bit-accurate, cycle-aware chip simulator, review designs and code, and ensure the team builds accurate, performant, and maintainable simulation infrastructure. You'll work closely with hardware architects, firmware, kernel, and software teams to identify technical challenges, set priorities, and enable early development of our full software stack.

This is a highly technical leadership role for someone who enjoys mentoring engineers, solving complex systems problems, and staying close to the code.

Key Responsibilities

• Provide technical leadership for the chip simulation team, guiding engineers through architecture, implementation, debugging, and performance optimization.
• Own the technical direction of our simulation infrastructure, ensuring accuracy, scalability, performance, and maintainability.
• Lead design and code reviews, establishing engineering best practices and maintaining a high bar for code quality.
• Mentor and support engineers, helping them navigate complex technical challenges.
• Drive hardware-software co-design, partnering with hardware architects and software teams to influence architecture and enable pre-silicon development.
• Oversee simulator integration, including simulated hardware modules, QEMU-based host integration, and multi-chip simulation.
• Guide validation and testing strategies to ensure simulation correctness and alignment with hardware specifications.
• Remain technically hands-on when needed, contributing to critical implementations, debugging, and architectural prototyping.

Representative Projects

• Lead the development of simulation models for our custom AI accelerator.
• Guide engineers building and validating bit-accurate and cycle-aware models of on-chip modules.
• Review and drive integration of simulated chips with QEMU hosts, enabling kernel driver development and host software testing.
• Define the architecture for multi-chip simulation to validate scale-out and scale-up approaches.
• Establish code review, testing, and debugging practices to improve simulator accuracy and engineering velocity.
• Partnering with hardware architects and software engineering leads to resolve complex pre-silicon issues and guide technical decisions.

You May Be a Good Fit If You Have

• Deep expertise in C/C++ and low-level systems software development.
• Experience leading complex technical projects and guiding other engineers through design, implementation, and code reviews.
• Strong understanding of computer architecture, hardware-software interfaces, and systems programming.
• Experience building or developing hardware simulators, architectural models, or other complex systems software.
• Ability to make architectural decisions, evaluate technical tradeoffs, and maintain high engineering standards.
• Strong debugging and problem-solving skills across hardware and software boundaries.
• Experience mentoring engineers and collaborating across technical disciplines.
• A track record of owning complex software systems from architecture through delivery.

Strong Candidates May Also Have Experience With

• Developing hardware or system simulators using SystemC, gem5, QEMU, or custom simulation frameworks.
• Cycle-accurate, cycle-aware, or bit-accurate hardware modeling.
• Custom AI accelerators, GPUs, CPUs, or SoC architectures.
• Firmware, kernel, and driver development, including Linux or FreeRTOS.
• Hardware verification and validation methodologies.
• Multithreaded and multiprocessing simulation frameworks.
• Simulation performance profiling and optimization.
• Python-based testing infrastructure, Bazel, and Git.
• Leading small technical teams or owning simulation infrastructure in a semiconductor or accelerator startup.

Benefits

• Medical, dental, and vision packages with generous premium coverage
• $500 per month credit for waiving medical benefits
• Housing subsidy of $2,500 per month for those living within walking distance of the office
• Relocation support for those moving to San Jose (Santana Row)
• Various wellness benefits covering fitness, mental health, and more
• Daily lunch and dinner in our office
• Unlimited compute budget subject to ROI justification

How we’re different

Etched believes in the Bitter Lesson We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.

We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.