Design Verification Engineer- Senior / Principal
- Location
- United States
- Job type
- Full-time
- Level
- Director
- Experience
- 8+ years
- Listed
- 28 days ago
Skills & highlights for this role
- UVM
- Verilog RTL debugging
- Python
- test plan development
- coverage-driven verification
Also useful
- Perl
- C++
- emulation
Overview
Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. Microsoft’s Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality.
We are looking for design verification engineer to work in the dynamic Microsoft Artificial Intelligence Silicon Engineering (AISiE) team. The candidate should be a highly motivated self-starter who will thrive in this cutting-edge technical environment.
Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.
Responsibilities
The AISiE silicon team is seeking a passionate, driven, and intellectually curious computer/electrical engineer to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge, custom IP and SoC designs that can perform complex and high-performance functions in an extremely efficient manner.
- Own or lead verification of complex flows at the SOC, subsystem, or IP levels
- Plan the verification of complex design IP/SoC interacting with the architecture and design engineers to identify verification test scenarios.
- Learn about the design and interact with partner teams to define verification strategies and test plans
- Develop verification environments and run and debug simulations to drive quality
- Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
- innovate to improve verification efficiency through methodologies or tools
- Coach and mentor others in your areas of expertise
- Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion
Additional information
Qualifications - 8-16 years of experience in design verification with a proven track record of delivering complex CPU or SoC IP’s
- Experience with verification for multiple product cycles from definition to silicon, including writing test plans, developing tests, debugging failures and coverage signoff in UVM or C++
- Substantial background in debugging RTL (Verilog) designs as well as simulation and/or emulation environments
- Scripting language such as Python or Perl
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.
Equal opportunity and legal notices
Microsoft is an equal opportunity employer.
All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances.
If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.
From Microsoft's careers page, first listed on Rolev.ai on October 11, 2026. Rolev.ai is not the employer.
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Common questions
Where is the Design Verification Engineer- Senior / Principal job at Microsoft located?
This Design Verification Engineer- Senior / Principal position at Microsoft is located in United States. Always check Microsoft's application page for specific state eligibility or relocation policies.
What qualifications are required for Design Verification Engineer- Senior / Principal at Microsoft?
For the Design Verification Engineer- Senior / Principal role, Microsoft highlights 8+ years of relevant experience; experience with UVM, Verilog RTL debugging, Python, test plan development, coverage-driven verification. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the Design Verification Engineer- Senior / Principal position at Microsoft?
This listing links directly to Microsoft's application page. You can apply directly on Microsoft's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.