Director of 3D Stacked Logic Design
- Pay
- $250,000 – $300,000 per year
- Location
- San Jose, CA · On-site
- Job type
- Full-time
- Level
- Director
- Experience
- 8+ years
- Education
- Bachelor's degree
- Listed
- 31 days ago
Skills & highlights for this role
- RTL design
- Verilog
- VHDL
- memory PHY design
- DRAM design for test (DFT)
Also useful
- memory controller design
- built-in self test (BIST)
- PPA optimization
Stated benefits & perks
- Health
- 401k match
- Pto
Job Summary
This role leads the design and implementation of high-speed digital IP for 3D-stacked DRAM peripheral circuits and DFT, driving co-development initiatives with U.S.-based customers to enable DRAM-on-Logic system configurations. Key responsibilities include managing foundry verification of service-ready IPs, establishing IP business infrastructure, and ensuring seamless integration within customer design environments. The position focuses on strengthening market leadership through advanced digital IP design and delivering comprehensive services that support the co-design of 3D-stacked DRAM logic dies.
Responsibilities
- Lead the design of high-speed digital IP for 3D-stacked DRAM peripheral circuits and DFT with U.S.-based customers (including RTL design to implementation).
- Drive foundry Verification of Service-Ready IPs and Infrastructure Setup for IP Business.
- Deliver Services to Ensure Seamless IP Integration in Customer Design Environments.
- Strengthen Leadership in the DRAM-on-Logic Era through advanced digital IP design for 3D-Stacked DRAM.
- Provide digital IP services for 3D-stacked DRAM to enable DRAM-on-Logic system configurations for customers.
- Co-design of 3D-stacked DRAM Logic Die with U.S -based customers.
- Improve competitiveness through close engagement with customers in US.
Qualifications
- Bachelor's degree or higher in Electrical Engineering or a related discipline.
- Development of Digital Logic IP/SoC based on Hardware Description Languages (Verilog, VHDL).
- 8+ years of relevant experience in the following areas:
- Experience in RTL design and implementation memory PHY, hard macro IP for high-speed circuit, or high-speed digital IP design
- Experience in memory controller
- Experience in memory Built-in Self Test(BIST), DRAM Design for Test(DFT) / Design for Debug(DFD)
- Deep understanding of PPA analysis and optimization, and physical design.
- Excellent verbal and written communication in English; ability to present technical concepts to cross functional teams and senior management.
Benefits
- Top Tier health insurance at no employee cost
- Paid day offs: Paid Time Off, Company Holidays, Parental Leave, Happy Fridays
- 401k Matching
- Flexible Spending Account (FSA) for Health Care & Dependent Care
- Educational reimbursement up to $10,000 per year
- Donation Matching and volunteering opportunities
- Corporate discount programs
- Free Breakfast/Lunch/Dinner provided to employees
Compensation
Our compensation reflects the cost of labor across several U.S. geographic markets, and we pay differently based on those defined markets. Pay within the provided range varies by work location and may also depend on job-related skills and experience. Your Recruiter can share more about the specific salary range for the job location during the hiring process.
About SK hynix America
At SK hynix America, we are at the forefront of semiconductor innovation. As a global leader in HBM, DRAM, and NAND flash technologies, we develop the advanced memory solutions powering everything from advanced mobile technology to massive AI data centers.
With major investments in the U.S. and a leading position in the global AI revolution, we build the critical infrastructure of the digital landscape and remain committed to sustainable operations. We invite innovative minds to be part of our journey. Here, you will be part of a collaborative team pioneering the next generation of memory technologies, expanding our market footprint, and defining the future of computing.
- Work Model: Onsite
- Job Title: Director of 3D Stacked Logic Design
- Office Location: San Jose, CA
- Job Type: Full-Time
- Work Model: Onsite
Equal opportunity and legal notices
SK hynix America is an Equal Employment Opportunity Employer. We provide equal employment opportunities to all qualified applicants and employees and prohibit discrimination and harassment of any type without regard to race, sex, pregnancy, sexual orientation, religion, age, gender identity, national origin, color, protected veteran or disability status, genetic information, or any other status protected under federal, state, or local applicable laws.
In compliance with federal law, SK hynix America also participates in the federal E-Verify program. Upon accepting an offer of employment, all newly hired individuals will be required to complete Form I-9, which includes verifying identity and legal authorization to work in the United States. Please review the official government posters detailing your rights and protections prior to applying:
- E-Verify Participation Poster (Bilingual English & Spanish)
- IER Right to Work Poster (English)
- IER Right to Work Poster (Spanish)
From SK hynix's careers page, first listed on Rolev.ai on October 10, 2026. Rolev.ai is not the employer.
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Common questions
What is the salary for the Director of 3D Stacked Logic Design role at SK hynix?
The Director of 3D Stacked Logic Design posting at SK hynix states compensation of $250,000 – $300,000 per year. It is listed as a full-time position. Final pay may depend on location, experience, and interview evaluation on SK hynix's official career site.
Where is the Director of 3D Stacked Logic Design job at SK hynix located?
This Director of 3D Stacked Logic Design position at SK hynix is located in San Jose, CA (On-site). Always check SK hynix's application page for specific state eligibility or relocation policies.
What qualifications are required for Director of 3D Stacked Logic Design at SK hynix?
For the Director of 3D Stacked Logic Design role, SK hynix highlights 8+ years of relevant experience; a bachelor's degree; experience with RTL design, Verilog, VHDL, memory PHY design, DRAM design for test (DFT). Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the Director of 3D Stacked Logic Design position at SK hynix?
This listing links directly to SK hynix's Greenhouse application page. You can apply directly on SK hynix's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the Greenhouse application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.