Engineering Manager, ML Compilers (Triton / Kernel DSLs)
- Pay
- $219,000 – $301,000 per year
- Location
- Bellevue, WA
- Job type
- Full-time
- Level
- Director
- Experience
- 5+ years
- Listed
- 28 days ago
Skills & highlights for this role
- compiler architecture
- ML compilers
- domain-specific languages
Also useful
- Triton
- MLIR
- LLVM
- PyTorch Inductor
- CUDA
Stated benefits & perks
- Health
- Equity
About the role
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- Engineering Manager, ML Compilers (Triton / Kernel DSLs)
- Bellevue, WA +1 location
- Engineering
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As a Software Engineering Manager in the MTIA Software team, you will lead the development of Meta's ML compiler stack for custom AI accelerators — the layer that enables kernels, both hand-written and generated, run efficiently on MTIA silicon.
Your team defines how Triton and lower-level DSLs map onto MTIA hardware, shaping language extensions, target-specific optimizations, and the kernel authoring experience used by kernel engineers, product groups, and model teams across Meta.
The work spans open-source contributions and internal compiler development, directly influences ISA and architecture roadmap decisions, and carries top-level executive visibility as a key AI infrastructure initiative. The team culture celebrates deep technical contributions with extensive knowledge-sharing, including external conference talks and published research.
Engineering Manager, ML Compilers (Triton / Kernel DSLs) Responsibilities
You will drive the development of the DSL compiler toolchain, including ML compiler integration, GEMM and non-GEMM kernel enablement, collectives support, and next-generation low-level DSLs. You will lead teams of engineers and technical leaders delivering large-scale projects across compiler infrastructure, kernel libraries, and production deployment on multiple accelerator generations
You will stay technically engaged, contributing hands-on through AI tools to evaluate the technical direction and quality across your teams. You will form trusted cross-functional partnerships with hardware/architecture, kernel, runtime, framework, and model teams while actively shaping strategy and roadmap, and you will balance near-term deployment commitments against long-term compiler investments. You will build and mentor engineers into AI-era leaders while maintaining high engineering craft standards
Minimum Qualifications
- 5+ years of experience in managing a software team in a fast-paced capacity
- Experience with compiler architecture and development, particularly with ML compilers or domain-specific languages (DSLs)
- Proven understanding and experience in executing full product life-cycles (prototyping, deployment, and support)
Preferred Qualifications
- Experience working closely with hardware architectures such as SIMD, GPU, RISC-V, AI accelerators, and influencing architecture roadmaps
- Experience with Triton, MLIR, or LLVM compiler infrastructure
- Experience with open-source community engagement and upstream contributions
- Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable impact (e.g., efficiency gains, quality improvements)
- Experience with PyTorch compiler stack internals such as Inductor
- Demonstrated ongoing AI skill development (e.g., prompt/context engineering, agent orchestration) and staying current with emerging AI technologies
- Experience with different programming models for high-performance computations, e.g., GPU CUDA programming or OpenCL or OpenMP programming
- Experience adhering to and implementing responsible, ethical AI practices (e.g., risk assessment, bias mitigation, quality and accuracy reviews)
- Experience with kernel-level performance optimization for AI accelerators
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United States of America: $219,000/year to $301,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
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From Meta's careers page, first listed on Rolev.ai on October 12, 2026. Rolev.ai is not the employer.
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Common questions
What is the salary for the Engineering Manager, ML Compilers (Triton / Kernel DSLs) role at Meta?
The Engineering Manager, ML Compilers (Triton / Kernel DSLs) posting at Meta states compensation of $219,000 – $301,000 per year. It is listed as a full-time position. Final pay may depend on location, experience, and interview evaluation on Meta's official career site.
Where is the Engineering Manager, ML Compilers (Triton / Kernel DSLs) job at Meta located?
This Engineering Manager, ML Compilers (Triton / Kernel DSLs) position at Meta is located in Bellevue, WA. Always check Meta's application page for specific state eligibility or relocation policies.
What qualifications are required for Engineering Manager, ML Compilers (Triton / Kernel DSLs) at Meta?
For the Engineering Manager, ML Compilers (Triton / Kernel DSLs) role, Meta highlights 5+ years of relevant experience; experience with compiler architecture, ML compilers, domain-specific languages. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the Engineering Manager, ML Compilers (Triton / Kernel DSLs) position at Meta?
This listing links directly to Meta's application page. You can apply directly on Meta's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.