FE Engineer

Summary

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

About the role

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Design and develop hardware for Apple’s mobile devices. Evaluate new ideas and features for the Central Processing Unit (CPU) hardware. Define the Micro-architecture of the CPU hardware. Develop the CPU hardware using a Hardware-Description-Language. Perform functional debug and closure of the design.

Responsible for timing and power closure of the design for the target Frequency and Power. Prepare documentation of the Design Specification. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role.

The base pay range for this role is between $150,400 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location.

Pay & Benefits

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan.

You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Minimum Qualifications

Master’s degree or foreign equivalent in Electrical and Computer Engineering or related field.

Experience and/or education must include

• Utilizing System Verilog or Verilog to write RTL for high-speed communication IPs
• Experience in RTL design utilizing System Verilog or Verilog with complex FSMs, and power saving features
• Utilizing Scripting language (Python, Perl, or TCL), including automating the RTL integration flow, process verification, synthesis and timing reports, and building hardware models
• Experience in computer architecture and logic design of industry standard interfaces
• Experience in digital logic design principles and computer architecture concepts including cache coherence and hardware-software interactions
• Constrained random verification process, functional coverage, code coverage, assertion methodology and philosophy
• Experience with placement, clock tree synthesis, routing or physical verification using tools from Cadence or Synopsys.
• Experience in debugging complex hardware, including identifying RTL bugs from Verilog code, analyzing simulation failures and fixing issues related to timing or power.
• Understanding of device physics in sub-micron nodes to address issues for leakage power, signal integrity and process variations.
• Experience in handling complex data path logic (MUX trees, adder, comb logic) to meeting timing, performance, area and power goals.

Preferred Qualifications

N/A