FPGA Design Engineer
- Pay
- $70,600 – $105,800 per year
- Location
- Rochester, NY · On-site
- Job type
- Full-time
- Level
- Senior
- Experience
- 3+ years
- Education
- Bachelor's degree
- Listed
- 5 days ago
Skills & highlights for this role
- VHDL
- RTL simulation
- circuit design
- circuit troubleshooting
Also useful
- AMD/Xilinx Vivado
- Xilinx ISE
- high-speed transceivers
- PCIe
- fiber optics
- Embedded Linux programming
- CAD schematic capture
About the role
As a community, the University of Rochester is defined by a deep commitment to Meliora - Ever Better. Embedded in that ideal are the values we share: equity, leadership, integrity, openness, respect, and accountability. Together, we will set the highest standards for how we treat each other to ensure our community is welcoming to all and is a place where all can thrive.
Job Location (Full Address)
250 East River Rd, Rochester, New York, United States of America, 14623
Opening
- Worker Subtype: Regular
- Time Type: Full time
- Scheduled Weekly Hours: 40
- Department: 250548 LLE-Laboratory for Laser Energ
- Work Shift: UR - Day (United States of America)
- Range: UR URG 112
Compensation Range
$70,600.00 - $105,800.00
The referenced pay range represents the minimum and maximum compensation for this job. Individual annual salaries/hourly rates will be set within the job's compensation range, and will be determined by considering factors including, but not limited to, market data, education, experience, qualifications, expertise of the individual, and internal equity considerations.
Responsibilities
The Laboratory for Laser Energetics (LLE) of the University of Rochester is a unique national resource for research and education in science and technology focusing on using lasers to initiate fusion and high energy density physics.
The LLE Electronics and Controls Engineering group has a broad portfolio of custom embedded electronics and consumer off the shelf (COTS) products deployed across the lab. We are seeking an experienced FPGA design engineer to aid in the development of new solutions and support of the exiting install base of devices across the facility. The successful candidate should have a BSEE/BSEET and 3 years of experience or equivalent training and experience.
Requirements
- Strong working knowledge of VHDL coding
- Experience with RTL simulation
- Familiarity with circuit design, development, and troubleshooting
Desired skills or experience includes
- Experience with AMD/Xilinx Vivado or ISE
- Familiarity with high-speed transceivers used in PCIe or fiber optics
- Embedded programming in Linux
- CAD schematic capture
Additional information
The University of Rochester is committed to fostering, cultivating, and preserving an inclusive and welcoming culture to advance the University’s Mission to Learn, Discover, Heal, Create – and Make the World Ever Better. This commitment extends to non-discrimination in the administration of our policies, admissions, employment, access, and recruitment of candidates, for all persons consistent with our values and based on applicable law.
Equal opportunity and legal notices
In support of our values and those of our society, the University is committed to not discriminating on the basis of age, color, disability, ethnicity, gender identity or expression, genetic information, marital status, military/veteran status, national origin, race, religion, creed, sex, sexual orientation, citizenship status, or any other characteristic protected by federal, state, or local law (Protected Characteristics).
From Rochester's careers page, first listed on Rolev.ai on November 8, 2026. Rolev.ai is not the employer.
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Common questions
What is the salary for the FPGA Design Engineer role at Rochester?
The FPGA Design Engineer posting at Rochester states compensation of $70,600 – $105,800 per year. It is listed as a full-time position. Final pay may depend on location, experience, and interview evaluation on Rochester's official career site.
Where is the FPGA Design Engineer job at Rochester located?
This FPGA Design Engineer position at Rochester is located in Rochester, NY (On-site). Always check Rochester's application page for specific state eligibility or relocation policies.
What qualifications are required for FPGA Design Engineer at Rochester?
For the FPGA Design Engineer role, Rochester highlights 3+ years of relevant experience; a bachelor's degree; experience with VHDL, RTL simulation, circuit design, circuit troubleshooting. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the FPGA Design Engineer position at Rochester?
This listing links directly to Rochester's Workday application page. You can apply directly on Rochester's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the Workday application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.