FPGA Design Engineer II
- Pay
- $90,000 – $216,000 per year
- Location
- Needham, MA · On-site
- Job type
- Full-time
- Level
- Senior
- Experience
- 3+ years
- Education
- Bachelor's degree
- Listed
- 31 days ago
Skills & highlights for this role
- FPGA design
- RTL design
- SystemVerilog
- digital logic design
Also useful
- PCIe
- Ethernet
- VCS
- Verdi
- Xilinx FPGA
- Altera FPGA
About the role
HPR is a leading provider of high-performance and ultra-low latency electronic trading and capital markets infrastructure solutions offered as a managed service. Our cutting-edge technology is used by tier-1 financial institutions to monitor and execute trades rapidly and efficiently. As we continue to innovate and grow, we're searching for a forward-thinking FPGA Design Engineer to help us build the future of capital markets infrastructure.
As an FPGA Design Engineer at HPR, you will
- Design, develop, optimize, and maintain high-performance FPGA compute and networking systems used in electronic trading
- Own the RTL design process from specification and coding through synthesis and FPGA implementation
- Partner with design verification engineers to review and execute comprehensive test plans
- Lead and mentor junior engineers, promoting our culture of continuous learning and collaboration
- Contribute to improving our development processes, tools, and methodologies
Required Qualifications
- BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or related
- 3+ years of experience in digital logic design for FPGAs or ASICs
- Proficiency in SystemVerilog (preferred) or VHDL
- Deep understanding of computer architecture and digital design concepts
- Experience with industry-standard simulation and debugging tools (e.g., VCS, Verdi)
- Comfortable working in a Linux environment
- Strong problem solving, debugging, and communication skills
Desired Qualifications
- Experience working with Xilinx and/or Altera FPGAs
- Familiarity with FPGA architecture and advanced design techniques, including optimizations for synthesis and timing closure
- In-depth knowledge of networking protocols (IP, TCP, UDP)
- Experience with high-speed interfaces (PCIe, Ethernet, and/or DDR)
- Familiarity with C programming and scripting in Python and/or Perl
Compensation
In compliance with Massachusetts law, the anticipated annual base salary range for this position is $90,000 to $216,000. Please note that this range represents the expected base salary for this role at the time of posting. The final offer may vary based on factors such as the candidate's experience, skills, and qualifications. This range does not include other forms of compensation such as potential bonuses, equity, or benefits.
This position requires being on-site at our office in Needham, MA full-time (5 days per week)
HPR does not currently provide employment sponsorship
Equal opportunity and legal notices
Hyannis Port Research is an Equal Opportunity Employer and is committed to providing a workplace free from discrimination and harassment. All employment decisions are made without regard to any characteristic protected by applicable federal, state, or local law.
We are committed to providing reasonable accommodations to qualified individuals with disabilities throughout the application and hiring process and during employment, consistent with applicable law. Applicants who require an accommodation to participate in the application or interview process or will require accommodation if hired should contact us via the "Connect With Us" button on our Careers page.
From HPR (Hyannis Port Research)'s careers page, first listed on Rolev.ai on October 10, 2026. Rolev.ai is not the employer.
How Rolev.ai helps with this application
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Common questions
What is the salary for the FPGA Design Engineer II role at HPR (Hyannis Port Research)?
The FPGA Design Engineer II posting at HPR (Hyannis Port Research) states compensation of $90,000 – $216,000 per year. It is listed as a full-time position. Final pay may depend on location, experience, and interview evaluation on HPR (Hyannis Port Research)'s official career site.
Where is the FPGA Design Engineer II job at HPR (Hyannis Port Research) located?
This FPGA Design Engineer II position at HPR (Hyannis Port Research) is located in Needham, MA (On-site). Always check HPR (Hyannis Port Research)'s application page for specific state eligibility or relocation policies.
What qualifications are required for FPGA Design Engineer II at HPR (Hyannis Port Research)?
For the FPGA Design Engineer II role, HPR (Hyannis Port Research) highlights 3+ years of relevant experience; a bachelor's degree; experience with FPGA design, RTL design, SystemVerilog, digital logic design. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the FPGA Design Engineer II position at HPR (Hyannis Port Research)?
This listing links directly to HPR (Hyannis Port Research)'s Greenhouse application page. You can apply directly on HPR (Hyannis Port Research)'s site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the Greenhouse application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.