GFX/Display IP Digital Design Engineer
- Pay
- $146,000 – $209,000 per year
- Location
- Sunnyvale, CA · On-site
- Job type
- Full-time
- Level
- Senior
- Experience
- 6+ years
- Education
- Bachelor's degree
- Listed
- 29 days ago
Skills & highlights for this role
- RTL coding
- micro-architecture development
- digital design verification
Also useful
- synthesis
- static timing analysis
- CDC and RDC analysis
About the role
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- GFX/Display IP Digital Design Engineer
- GFX/Display IP Digital Design Engineer
- Sunnyvale, CA +3 locations
- Hardware
- + 1 more
Meta is seeking highly skilled Design Engineers to join our team. In this role, you will contribute to the development of advanced technology solutions, including machine learning and network acceleration. You will collaborate with researchers and engineers to design, implement, and optimize low-power hardware accelerators, state-of-the-art SoCs, and custom silicon solutions that enable the next generation of innovative devices and hardware.
GFX/Display IP Digital Design Engineer Responsibilities
- Contribute to ASIC digital µArchitecture and design
- Assist performance/power analysis of the design and help meet power and performance targets
- Work with architects to map algorithms onto the hardware and specify requirements for IP and subsystems integration
- Collaborate with adjacent teams such as Verification, Physical Design, and Design-for-Test
- Develop micro-architecture, RTL coding, and design verification for complex IPs
- Drive IP/sub-system micro-architecture and RTL design in collaboration with DV and PD leads
Minimum Qualifications
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
- 6+ years of experience as a Hardware Design Engineer for production silicon shipped in volume
- Experience in digital design µArchitecture, RTL coding, and micro-architecture development
- Experience communicating technical design decisions and trade-offs to cross-functional partners such as verification, physical design, and architecture teams
Preferred Qualifications
- Experience micro-architecting and designing IP with heavy fixed-point and/or floating-point data path logic
- Experience with synthesis, static timing analysis, and timing closure methodologies
- Experience collaborating with verification or physical design teams during the silicon development cycle
- Experience with microarchitecture and design optimization for power, performance, and area
- Experience with at least one procedural programming language (C, C++, Python, etc.)
- Experience with shell scripting (bash and/or csh)
- Experience with CDC and RDC analysis
- Experience with pixel processing pipelines like 2D/3D GFX engines and/or display processing units
- Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable impact (e.g., efficiency gains, quality improvements)
- Experience adhering to and implementing responsible, ethical AI practices (e.g., risk assessment, bias mitigation, quality and accuracy reviews)
- Demonstrated ongoing AI skill development (e.g., prompt/context engineering, agent orchestration) and staying current with emerging AI technologies
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Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology.
People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
For those who live in or expect to work from California if hired for this position, please click here for additional information.
United States of America: $146,000/year to $209,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
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From Meta's careers page, first listed on Rolev.ai on October 12, 2026. Rolev.ai is not the employer.
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All Meta jobsCommon questions
What is the salary for the GFX/Display IP Digital Design Engineer role at Meta?
The GFX/Display IP Digital Design Engineer posting at Meta states compensation of $146,000 – $209,000 per year. It is listed as a full-time position. Final pay may depend on location, experience, and interview evaluation on Meta's official career site.
Where is the GFX/Display IP Digital Design Engineer job at Meta located?
This GFX/Display IP Digital Design Engineer position at Meta is located in Sunnyvale, CA (On-site). Always check Meta's application page for specific state eligibility or relocation policies.
What qualifications are required for GFX/Display IP Digital Design Engineer at Meta?
For the GFX/Display IP Digital Design Engineer role, Meta highlights 6+ years of relevant experience; a bachelor's degree; experience with RTL coding, micro-architecture development, digital design verification. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the GFX/Display IP Digital Design Engineer position at Meta?
This listing links directly to Meta's application page. You can apply directly on Meta's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.