High Performance Compute Responsible Engineer

About the Role

You'll own the compute hardware from architecture through bring up - there's no hand-off to another team mid-stream. You pick the components, you design the board, you're the one powering it on and debugging it with the software team

• Design the compute boards that deliver 10 TFLOPS of processing power for onboard AI/ML inference and science data processing within the Relay Data Center, owning the hardware from schematic capture through board-level validation
• Architect and implement power delivery networks for high-complexity carrier boards, including 500W+ multi-rail designs with tight sequencing integrating GPU or CPU compute modules onto custom PCBs with high-speed coherent interconnects
• Define thermal interface requirements (power dissipation budgets, junction temperature limits, interface material selection) and hand off specifications to the mechanical team, who own the thermal and packaging solution
• Design and validate high-speed memory interfaces (HBM, DDR5), PCIe Gen 4/5 chip-to-chip links, and 10 GbE+ Ethernet connections to the payload network, along with board-level power monitoring, current limiting, and radiation upset recovery circuitry
• Lead hardware bringup and board-level validation. Diagnose and resolve issues hands-on while collaborating closely with the software engineers who are building the software environment on top of your hardware

About You

• BSEE with 5+ years designing and bringing up high-speed digital compute boards, ideally with direct exposure to GPU, HPC, or modern accelerator platforms
• Proficient in high-speed digital PCB design principles: multi-GHz signaling, dense BGA escape routing on high layer count stackups, and signal integrity analysis through both simulation and measurement
• Strong command of power integrity and power delivery network design, including multi-rail architectures, power management IC selection, voltage sequencing, and board-level current limiting
• Strong working experience with high-speed serial interface design, analysis and debug, particularly PCIe Gen 4/5 topology, configuration, and Ethernet

Nice to haves but not required

• Experience writing basic firmware for hardware bring up and validation
• Hands-on embedded systems debug skills that let you move between careful pre-fab analysis and fast, practical problem-solving on the bench
• Experience with COTS hardware for space applications, including radiation awareness, component derating, and upset mitigation techniques (ECC memory scrubbing, watchdog/reset architectures)
• Hands-on experience with physical PCB layout, particularly for complex, high-layer-count boards with dense BGA packages
• Familiarity with thermal management at the board and system level, including junction temperature modeling, thermal interface material selection, and collaborating with mechanical engineers on packaging solutions for high-TDP modules

Additional information

At Relativity Space, we are committed to transparency and fairness in our compensation practices. Actual compensation will be determined based on experience, qualifications, and other job-related factors.

Pay and benefits

Compensation is only one part of our total rewards package. Relativity Space offers competitive salary and equity, a generous PTO and sick leave policy, parental leave, an annual learning and development stipend, and more! To see some of the benefits & perks we offer, please visit here.

Hiring Range: $175,000—$263,000 USD

Please note: Relativity Space does not accept unsolicited resumes, candidate profiles, or referrals from recruitment agencies or search firms. Any unsolicited submission - via email, our website, social media, or directly to an employee - will be deemed the property of Relativity Space, and no fee will be owed absent a current, fully executed agreement with Talent Acquisition that specifically authorizes submissions for the applicable role.