High Speed PHY FW Engineer

Our Goal: a Perfect Fit in Your SoC

Cadence provides an open IP platform and IP Factory approach so you can design, customize, and verify IP and IP subsystems to fit your SoCs in ways that weren't possible before. We work with you to make sure our IP fits as seamlessly as possible into your designs. Growing synergies within our IP portfolio, and between our IP portfolio and EDA tools, provide you with important flexibility and time-to-market advantages over traditional IP integration approaches.

Quality is Integral to What We Do, Not an Afterthought

Cadence has amassed thousands of IP tape outs, and our IP solutions are in use by many of the world's leading semiconductor and systems companies. The Cadence quality assurance program is based on clear, documented policies and reproducible procedures that begin in product definition and development and extend through testing and release to ongoing maintenance and support. Our procedures include specification and maintenance of appropriately detailed product definitions and test/release plans for every Cadence product.

Position Details

High Speed SERDES PHY Firmware Design Engineer (T1/T2)

This is an opportunity to join a dynamic and growing team of experienced engineers developing physical IP for industry-standard high-speed serial-link protocols. The successful candidate will ideally be a highly motivated self-starter who is able to work independently to complete assigned tasks and can also contribute to project leadership. It is expected that the candidate will contribute during all phases of firmware development for high speed SERDES from architecture development to implementation, verification, testing and customer deployment.

This includes

• Contribution during firmware architecture development and implementation of the defined firmware features.
• Working closely with verification team to debug and fix the FW issues found with verification simulations.
• Involvement during post-silicon testing and validation to identify any FW and HW related functionality and performance issues and implement any necessary FW improvements to address these issues.
• Interaction with Product Engineering, System Validation and Design team to debug IP issues in the field and provide hot fixes.

Responsibilities include

• Help to build system level prototype control software to develop/validate adaptation, equalization, and control algorithms for high speed SERDES.
• Implement assigned FW features and work closely with verification and validation team to ensure the functionality and robustness of the implemented features.
• Support of Validation team during electrical and system characterization.
• Support of Product Engineering team during customer deployment of the IP.

Specific desired skills

• Solid programming knowledge in C/C++ and Python
• Understanding of wireline communication principles
• Knowledge in mixed signal circuit design and digital signal processing techniques
• Strong problem solving and communication skills
• BSc or MSc in Electrical Engineering
• US Citizen or Permanent resident

Pay and benefits

The annual salary range for California is $101,500 to $188,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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