Apple
Direct employer career site

IC Package Design Engineer

Location
Various Locations within Austin Metro Area · On-site
Job type
Full-time
Level
Senior
Education
Bachelor's degree
Listed
13 days ago

Skills & highlights for this role

  • IC package physical design
  • Substrate layout for SoC, memory, RF, and cellular ICs
  • Parasitic extraction (RLGC) and S-parameter modeling
  • Signal and power integrity analysis
  • Cross-functional collaboration

Also useful

  • Cadence Allegro
  • Mentor Xpedition
  • SiP, PoP, and wirebond package experience
  • Calibre
  • CAM350
  • DDR and PCIe interface layout constraints
  • HFSS
  • PowerSI

Summary

Our Packaging team defines, designs, and integrates advanced electronic packaging solutions for Apple’s internal and custom components across products including iPhone, iPad, Mac, Apple Watch, and Apple TV. We’re looking for a Package Design Engineer to drive the physical design and integration of advanced semiconductor packages across SoC, memory, RF, and cellular technologies. You will play a key role in shaping the architecture, scalability, and efficiency of next-generation products while advancing design methodologies through automation and AI.

About the role

As a Package design engineer, you will lead advanced package architecture, drive next-generation package structure and configuration optimization, and own Package/SiP/module physical design from concept through tape-out. You will collaborate closely with cross-functional teams to deliver optimized SI/PI performance across a wide range of silicon technologies You are expected to leverage AI tools to enhance design efficiency, quality and performance.

Responsibilities

  • Perform physical layout of package substrates for diverse silicon, including System-on-Chip (SoC), Memory, RF, and cellular integrated circuits (ICs).
  • Execute parasitic extraction (RLGC) and S-parameter modeling to validate that package designs meet Signal and Power Integrity (SI/PI) performance targets.
  • Lead cross-functional collaboration on package feasibility and system co-optimization; align with Product Design on chip floorplan, System Architecture on package configuration, and Silicon/SIPI teams on electrical performance.
  • Drive package design methodology improvements by evaluating new CAD tools and developing automated design and verification flows to enhance efficiency and streamline the release process.

Minimum Qualifications

Bachelors degree required.

Preferred Qualifications

Package Design Proficiency: Proven experience in IC package physical design using Cadence Allegro or Mentor Xpedition platforms, with knowledge of diverse package types (SiP, PoP, wirebond) and verification tools (Calibre, CAM350).

High-Speed & SI/PI Expertise: Strong understanding of high-speed interface layout constraints (DDR, PCIe) and Signal/Power Integrity (SI/PI) analysis, including experience with simulation tools like HFSS or PowerSI and parasitic extraction (RLGC, S-parameters).

  • Manufacturing & Materials Knowledge: Solid grasp of substrate manufacturing processes, design rules (DRC), design for manufacturability (DFM), and various sophisticated package configurations and assembly technology
  • Automation & Scripting Skills: Familiarity with a Unix/Linux environment and proficiency in scripting languages such as Python, Perl, or TCL to automate design tasks and improve workflows.
Read the original posting

From Apple's careers page, first listed on Rolev.ai on October 27, 2026. Rolev.ai is not the employer.

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Common questions

Where is the IC Package Design Engineer job at Apple located?

This IC Package Design Engineer position at Apple is located in Various Locations within Austin Metro Area (On-site). Always check Apple's application page for specific state eligibility or relocation policies.

What qualifications are required for IC Package Design Engineer at Apple?

For the IC Package Design Engineer role, Apple highlights a bachelor's degree; experience with IC package physical design, Substrate layout for SoC, memory, RF, and cellular ICs, Parasitic extraction (RLGC) and S-parameter modeling, Signal and power integrity analysis, Cross-functional collaboration. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.

How do I apply for the IC Package Design Engineer position at Apple?

This listing links directly to Apple's application page. You can apply directly on Apple's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.