Lead Design Engineer
- Location
- Austin, TX · On-site
- Job type
- Full-time
- Level
- Director
- Experience
- 5+ years
- Education
- Bachelor's degree
- Listed
- 3 days ago
Skills & highlights for this role
- Digital design fundamentals
- Verilog
- SystemVerilog
- Lint/CDC tools
- Synthesis constraints
- Static Timing Analysis (STA)
- Simulation tools (Xcelium, Verisium)
- Python
- Perl
- Tcl
- Communication skills
Also useful
- Synthesis tools
- AMBA protocols
- ARM IPs
- PCIe
- Ethernet
- DDR
- Workflow automation
Responsibilities
- Design and integration of IPs in SoC based on high-level architectural specifications from customers.
- Perform Lint/CDC checks on the design for quality assurance and resolve related issues.
- Create synthesis constraints for the design at the IP and SoC level and perform basic synthesis for PPA (Power, Performance, Area) optimization.
- Create detailed Microarchitectural Specification documents for the design.
- Provide support to the verification team for test plan creation, coverage analysis, and feature debugging.
- Provide support to the physical design team as needed for design implementation.
- Implement innovative solutions to automate repetitive tasks.
- Collaborate within and across teams for effective project execution.
Requirements
- B.E./B.Tech/M.Tech with 5-8 years of experience as a digital design engineer.
- Strong knowledge of digital design fundamentals and Verilog/SystemVerilog (SV).
- Solid knowledge of Lint/CDC tools and the ability to set up flows from scratch.
- Knowledge of creating synthesis constraints and Static Timing Analysis (STA); familiarity with synthesis tools is a plus.
- Familiarity with simulation tools (e.g., Xcelium, Verisium) to support verification.
- Experience with AMBA protocols and other ARM IPs is a plus.
- Experience with high-speed IPs such as PCIe, Ethernet, and DDR is a plus.
- Proficiency in scripting languages (Python/Perl/Tcl).
- Ability to innovate and automate repetitive tasks.
- Good communication skills for effective cross-functional collaboration.
We're doing work that matters. Help us solve what others can't.
About Cadence
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
From Cadence's careers page, first listed on Rolev.ai on November 9, 2026. Rolev.ai is not the employer.
How Rolev.ai helps with this application
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Common questions
Where is the Lead Design Engineer job at Cadence located?
This Lead Design Engineer position at Cadence is located in Austin, TX (On-site). Always check Cadence's application page for specific state eligibility or relocation policies.
What qualifications are required for Lead Design Engineer at Cadence?
For the Lead Design Engineer role, Cadence highlights 5+ years of relevant experience; a bachelor's degree; experience with Digital design fundamentals, Verilog, SystemVerilog, Lint/CDC tools, Synthesis constraints, Static Timing Analysis (STA). Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the Lead Design Engineer position at Cadence?
This listing links directly to Cadence's Workday application page. You can apply directly on Cadence's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the Workday application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.