Lead Systems Signal Integrity/Power Integrity Engineer

About the role

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. This architecture allows Cerebras to deliver industry-leading training and inference speeds; over 10 times faster than GPU-based hyperscale cloud inference services.

This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation.

Cerebras works with the leading model labs, global enterprises, and cutting-edge AI-native startups. OpenAI recently announced a multi-year partnership with Cerebras, to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference.

We are seeking an experienced System Signal Integrity and Power Integrity Engineer Lead to solve complex, high-impact integrity challenges in next-generation AI compute systems. This role is focused on deep technical analysis and hands-on problem solving across high-speed interfaces, power delivery networks, rigid and flex interconnects, and advanced packaging.

The ideal candidate is a technical expert engaged to resolve difficult SI/PI problems spanning silicon, package, PCB, flex, and connector domains.

Key Responsibilities

• Solve complex signal integrity and power integrity problems for high-speed AI compute platforms, including chip-to-chip and chip-to-board interfaces.
• Perform advanced pre-layout and post-layout SI/PI analysis across PCBs, flex circuits, rigid-flex assemblies, connectors, and advanced packages.
• Lead root-cause analysis of challenging SI/PI issues such as margin shortfalls, impedance discontinuities, coupling, resonances, and simulation-to-hardware mismatches.
• Analyze and resolve SI/PI challenges associated with flex circuits, high-speed flex connectors, interposers, and advanced packaging technologies.
• Analyze and troubleshoot power delivery networks using DC and AC simulations and hardware correlation to resolve performance and stability issues.
• Define and refine PCB, rigid-flex, and flex circuit stack-ups, material selections, and impedance structures as required to meet performance targets.
• Review schematics, PCB layouts, and flex designs to identify SI/PI risks and recommend targeted design changes.
• Work closely with silicon and package design teams to resolve SI/PI issues related to bump/ball assignments, package-to-PCB transitions, and interface interactions.
• Act as a technical escalation point for complex SI/PI issues across multiple programs.

Minimum Qualifications

• Master’s degree in Electrical Engineering.
• 15+ years of demonstrated depth of expertise in system-level signal integrity and power integrity engineering for high-speed hardware systems.

Required Experience and Skills

• Deep expertise in high-speed serial and parallel interface analysis and debug.
• Strong hands-on experience with PCB, rigid-flex, and flex circuit stack-up design and analysis.
• Advanced SI/PI analysis of flex connectors, high-density interconnects, and advanced packaging technologies.
• Proficiency with 2D and 3D electromagnetic simulation tools.
• Power delivery network analysis, simulation, and lab correlation at the system level.
• Strong grounding in transmission line theory, microwave engineering, and high-speed design fundamentals.
• Proven ability to correlate simulation results with hardware behavior and drive concrete design fixes.
• Experience working on server hardware, AI accelerators, hardware accelerator, datacenter, AI Hardware, enterprise product, GPU, CPU, TPU, server platform etc.

Additional Information

• Experience with large-scale AI or high-performance compute systems is preferred.

Pay and benefits

The base salary range for this position is $220,000 to $250,000+ annually. Actual compensation may include bonus and equity, and will be determined based on factors such as experience, skills, and qualifications.