NPU Performance Engineer, SI Hardware
- Location
- Austin, TX · On-site
- Job type
- Full-time
- Level
- Mid-level
- Listed
- 29 days ago
About the role
- NPU Performance Engineer, SI Hardware | Tesla (Tesla SI)
- Location: Austin, Texas | Req ID: 267771 | Job Type: Full-time
- What to Expect
The Tesla SI Hardware team is at the forefront of revolutionizing artificial intelligence through cutting-edge hardware innovation. Comprising brilliant engineers and visionaries, the team designs and develops advanced SI inference chips tailored to accelerate Tesla’s machine learning capabilities.
A key part of this effort is Dojo, Tesla's custom supercomputer system built to efficiently train massive neural networks on vast video data from the fleet. The work of Tesla's SI Hardware team powers the neural networks behind Full Self-Driving (FSD), and Tesla humanoid robot, Optimus, pushing the boundaries of computational efficiency and performance.
By creating custom silicon and optimized architectures, the team ensures Tesla remains a leader in AI-driven automotive and energy solutions, shaping a future where intelligent machines enhance human life.
Join Tesla’s elite SI Hardware team and become a driving force behind the next generation of autonomous intelligence. In this high-impact role, you will own performance verification of next-generation NPUs, stress-testing and correlating real ML models and handwritten kernels all the way down to silicon behavior.
This is hands-on, deep-dive work that blends kernel development, compiler integration, and rigorous verification to ensure our NPUs deliver groundbreaking efficiency, throughput, and determinism. You’ll write kernels destined for the ML compiler team while relentlessly validating performance across the full stack — helping power Tesla’s Full Self-Driving and Optimus platforms at the absolute edge of what’s possible.
What You'll Do
- Own end-to-end performance verification of Tesla’s custom NPUs, ensuring real ML workloads and handwritten kernels meet aggressive power, latency, utilization, and throughput targets
- Write, optimize, and verify high-performance kernels for critical ML operators, with many kernels directly integrated and consumed by the ML compiler team
- Develop advanced verification suites and correlation methodologies that map high-level ML models through custom kernels down to actual NPU hardware behavior
- Collaborate closely with ML compiler engineers, and hardware architects to translate model requirements into optimized kernels and validated hardware performance
- Debug complex performance discrepancies across simulation, emulation, FPGA, and post-silicon environments — root-causing issues at the intersection of model, kernel, compiler, and NPU microarchitecture
- Build automated regression frameworks, performance dashboards, and correlation tools that accelerate verification cycles and provide real-time visibility into NPU health
- Perform deep analysis on key metrics (utilization, bandwidth, latency, power) and establish iron-clad correlation between pre-silicon predictions and real silicon measurements
- Document and present verification findings, correlation results, and optimization breakthroughs to influence future NPU roadmaps and Tesla’s SI silicon strategy
What You'll Bring
- Degree in Engineering, Electrical Engineering, Computer Science, or related field or equivalent experience
- 1+ years of intense industry experience in performance verification of NPUs, SI accelerators, or ML hardware
- Strong track record writing, optimizing, and verifying high-performance kernels targeted at NPUs or similar tensor-core architectures, with direct experience supplying kernels to ML compiler teams
- Deep expertise correlating ML model behavior → kernel execution → compiler integration → NPU hardware across the full verification stack (RTL simulation, emulation, and post-silicon)
- Mastery of Python and C++ for building high-performance verification tools, automation frameworks, kernel development, and analysis pipelines
- Solid understanding of NPU microarchitecture, memory hierarchies, dataflow scheduling, on-chip interconnects, parallel computing principles, and ML compiler flows
- Kernel writing and ML compiler experience is a plus
- Exceptional debugging skills with a proven ability to resolve the toughest NPU performance bottlenecks under tight deadlines
- Thrives in a fast-paced, ownership-driven, small-team environment with outstanding technical communication skills
Benefits
Along with competitive pay, as a full-time Tesla employee, you are eligible for the following benefits at day 1 of hire:
- Medical plans > plan options with $0 payroll deduction
- Family-building, fertility, adoption and surrogacy benefits
- Dental (including orthodontic coverage) and vision plans, both have options with a $0 paycheck contribution
- Company Paid (Health Savings Accounts) HSA Contribution when enrolled in the High-Deductible medical plan with HSA
- Healthcare and Dependent Care Flexible Spending Accounts (FSA)
- 401(k) with employer match, Employee Stock Purchase Plans, and other financial benefits
- Company paid Basic Life, AD&D
- Short-term and long-term disability insurance (90 day waiting period)
- Employee Assistance Program
- Sick and Vacation time (Flex time for salary positions, Accrued hours for Hourly positions), and Paid Holidays
- Back-up childcare and parenting support resources
- Voluntary benefits to include: critical illness, hospital indemnity, accident insurance, theft & legal services, and pet insurance
- Weight Loss and Tobacco Cessation Programs
- Tesla Babies program
- Commuter benefits
- Employee discounts and perks program
- Earned Wage Access: Real-time pay access paid daily, subject to eligibility and schedule (applicable for below Sr. Managers levels)
From Tesla's careers page, first listed on Rolev.ai on October 12, 2026. Rolev.ai is not the employer.
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