Package Engineer, Annapurna Labs - AI Silicon Packaging
- Location
- Austin, TX · On-site
- Job type
- Full-time
- Level
- Senior
- Experience
- 6+ years
- Education
- Bachelor's degree
- Listed
- 19 days ago
Skills & highlights for this role
- Coordination between technical teams, peers, and business stakeholders
- Expertise in at least one of: substrate/PCB technology, interposer technology, or package and board assembly technology
- Track record of driving technology development from concept through qualification
Also useful
- Package-level SI/PI concepts (impedance control, PDN design, crosstalk-aware routing)
- Substrate/PCB architecture, materials, processes, yield, warpage, and DFM for advanced systems
- Interposer fabrication and DFM for 2.5D/3D systems (e.g., CoWoS-R/L)
- Package and board assembly processes (flip-chip, thermal compression bonding, hybrid bonding, underfill, molding, TIM, fine-pitch assembly)
- Co-packaged optics (CPO) experience
About the role
Annapurna Labs designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.
The Package Technology Development team within Annapurna Labs is building the packaging, substrate/PCB, interposer, and assembly technologies for the next-generation Trainium AI accelerators. The team works at the intersection of silicon, package, board, system, and rack, partnering closely with design, manufacturing, supply chain, and reliability teams to bring bleeding-edge AI systems from concept to volume production.
Key job responsibilities
- Define and drive package technology development across architecture, design, materials, processes, yield, warpage, reliability, and system-level integration for next-generation Trainium systems, from early concept through volume production.
- Partner with OSATs and component/material/equipment suppliers on capability validation, test vehicle development, qualification, TGA, FMEA, risk retirement, root-cause analysis, and corrective/preventive actions
- Evaluate tradeoffs across performance, cost, yield, manufacturability, warpage, thermal performance, and reliability to guide technology decisions and qualification strategies.
- Represent the package technology team in cross-functional design reviews, sign-off milestones, and program checkpoints with silicon, board, system, and supply chain teams.
- Identify opportunities for novel packaging architectures and process simplifications to reduce cost, improve yield, and accelerate time-to-market.
Basic Qualifications
- Experience coordinating between technical teams, peers and business stakeholders - Bachelor's in Materials Science, Mechanical Engineering, Electrical Engineering, Chemical Engineering, or 6+ years of industry experience in a related field - Expertise in at least one: substrate/PCB technology, interposer technology, or package and board assembly technology - Track record of driving technology development from concept through qualification
Preferred Qualifications
- Master's in Materials Science, Mechanical Engineering, Electrical Engineering, Chemical Engineering, or 8+ years of industry experience in a related field - Or PhD in Materials Science, Mechanical Engineering, Electrical Engineering, Chemical Engineering, or 6+ years of industry experience in a related field - Familiarity with package-level SI/PI concepts (impedance control, PDN design, crosstalk-aware routing) sufficient to collaborate with SI/PI engineers - Experience with substrate/PCB architecture, materials, processes, yield, warpage, and DFM for advanced systems, including HDI, microvias, fine-line/space, and high-speed/power routing - Experience with interposer fabrication and DFM for 2.5D/3D systems (e.g., CoWoS-R/L), including RDL, TSV, silicon bridges, microbumps, and package floorplanning - Experience with package and board assembly processes, including flip-chip, thermal compression bonding, hybrid bonding, underfill, molding, TIM, and fine-pitch assembly. Co-packaged optics (CPO) experience is a plus. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If the country/region you're applying in isn't listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. USA, AZ, Tempe - 153,600.00 - 215,000.00 USD annually USA, TX, Austin - 153,600.00 - 215,000.00 USD annually
From Annapurna Labs (U.S.) Inc.'s careers page, first listed on Rolev.ai on October 22, 2026. Rolev.ai is not the employer.
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Common questions
Where is the Package Engineer, Annapurna Labs - AI Silicon Packaging job at Annapurna Labs (U.S.) Inc. located?
This Package Engineer, Annapurna Labs - AI Silicon Packaging position at Annapurna Labs (U.S.) Inc. is located in Austin, TX (On-site). Always check Annapurna Labs (U.S.) Inc.'s application page for specific state eligibility or relocation policies.
What qualifications are required for Package Engineer, Annapurna Labs - AI Silicon Packaging at Annapurna Labs (U.S.) Inc.?
For the Package Engineer, Annapurna Labs - AI Silicon Packaging role, Annapurna Labs (U.S.) Inc. highlights 6+ years of relevant experience; a bachelor's degree; experience with Coordination between technical teams, peers, and business stakeholders, Expertise in at least one of: substrate/PCB technology, interposer technology, or package and board assembly technology, Track record of driving technology development from concept through qualification. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the Package Engineer, Annapurna Labs - AI Silicon Packaging position at Annapurna Labs (U.S.) Inc.?
This listing links directly to Annapurna Labs (U.S.) Inc.'s application page. You can apply directly on Annapurna Labs (U.S.) Inc.'s site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.