Pre/Post Silicon Validation Engineer

About the role

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• Pre/Post Silicon Validation Engineer
• Sunnyvale, CA +2 locations
• Hardware
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Meta's Infrastructure Silicon organization is building custom ASICs to power the compute demands of AI, data center, and next-generation platform workloads. We are looking for an experienced Silicon Validation Engineer to join our team, working across the full silicon lifecycle from early pre-silicon design input and FPGA emulation to post-silicon bring-up, characterization, and deployment in the production fleet.

You will play a central role in validating custom silicon, driving emulation bring-up, and leading debug efforts across hardware, firmware, and software layers to ensure successful product delivery. Your work will directly influence the reliability and performance of Meta's custom infrastructure chips at scale.

Pre/Post Silicon Validation Engineer Responsibilities

• Work across all aspects of the silicon lifecycle to deliver reliable, performant silicon - from early architecture and design input, through pre-silicon test readiness and validation, to post-silicon bring-up, characterization, and fleet deployment
• Define and execute silicon validation strategies, including test plans, coverage models, regression frameworks, and productization readiness criteria
• Develop and maintain emulation infrastructure for custom silicon, including FPGA-based emulation platform bring-up and configuration
• Partition and map RTL designs onto emulation platforms, optimizing for timing closure, resource utilization, and debug visibility
• Build and maintain software, scripting, and automation infrastructure for validation and emulation workflows, including silicon diagnostics, performance analysis, debug tooling, job scheduling, and results analysis across bare-metal and full-stack systems
• Debug complex hardware, firmware, and software interactions across RTL, firmware, and software layers; root-cause, resolve, and remediate silicon issues across the product lifecycle
• Partner with RTL design and verification engineers to identify and resolve functional bugs prior to tape-out
• Ensure continuity between pre- and post-silicon environments so that emulation accurately models silicon behavior and validation content transitions cleanly into lab and data center bring-up
• Understand production system use cases to improve silicon validation, and feed insights from the production fleet back into next-generation architecture and design
• Evaluate and integrate new validation and emulation tools, methodologies, and platform capabilities to improve throughput and debug efficiency
• Lead end-to-end validation efforts, driving strategy, planning, execution, and post-silicon enablement and provide technical guidance to peers on validation methodology, debug techniques, and infrastructure best practices

Minimum Qualifications

• Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
• 6+ years of experience in ASIC/SoC development cycles with pre-silicon and/or post-silicon validation, hardware verification, or FPGA-based emulation for custom silicon
• Experience troubleshooting, debug, and analytics for silicon products, including debugging hardware-software interactions using waveform viewers, logic analyzers, and hardware debug probes
• Experience with ASIC design or development, emulation, and post-silicon validation
• Experience developing automation scripts and test infrastructure in Python, C/C++,
• Experience collaborating with internal and external partners across RTL design, verification, firmware, software, and systems teams in a custom silicon environment

Preferred Qualifications

• Experience with RTL partitioning, FPGA synthesis, and timing closure on large-scale emulation platforms such as Palladium, Veloce, or Zebu
• Experience working with emulation/FPGA platforms for test content development, debug, and post-silicon enablement
• Experience with post-silicon bring-up and transitioning validation content from emulation to silicon environments
• Familiarity with SystemVerilog, UVM, or formal verification methodologies as complements to emulation-based validation
• Experience with hardware description and simulation tools such as VCS, Xcelium, or Questa
• Experience with infrastructure or data center silicon domains such as networking ASICs, AI accelerators, or storage controllers
• Experience with some of the following modules/domains: PCIe, Networking, Ethernet, Flash, Memory, CPU, GPU, DRAM (LP/DDR4/5 and/or HBM)
• Understanding of embedded systems, including common bus protocols such as I2C, SPI, USB, and/or PCIe
• Experience with Linux systems and server systems management
• Experience in application and host driver development, including RDMA Gen Driver, DPDK, or Meta RoCE/RoCEv2, for NIC product validation

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