Principal Hardware Engineer - Networking
- Location
- Mountain View | United States, CA · On-site
- Job type
- Full-time
- Level
- Lead / Staff
- Experience
- 10+ years
- Education
- Bachelor's degree
- Listed
- 28 days ago
Skills & highlights for this role
- switch ASIC architecture
- SI/PI analysis
- 112G/224G PAM4
- BMC and CPLD/FPGA design
- SONiC hardware enablement
Also useful
- retimers
- pluggable optical modules
- hardware bring-up
- DFM/DFT
About the role
- Define and drive the multi-generation electrical and system architecture roadmap for custom network switch platforms supporting Azure AI infrastructure, including technology insertion, platform reuse, risk retirement, and lifecycle strategy.
- Own platform-level requirements decomposition and architectural tradeoffs spanning network, rack, performance, reliability, availability, serviceability, security, telemetry, manufacturing, cost, and schedule.
- Provide technical authority for switch ASIC, control-plane CPU, BMC, CPLD/FPGA, clocking, reset, power delivery, high-speed Ethernet, retimers, optical modules, cable backplanes, telemetry, and platform-management interfaces.
- Lead architecture and design reviews across schematic, PCB stack-up, signal integrity, power integrity, layout, BOM, component derating, DFT, DFM, DFR, and system integration; establish decision criteria and drive closure of cross-disciplinary issues.
- Establish platform bring-up, electrical validation, margining, interoperability, stress, reliability, and production-test strategies; ensure evidence-based exit criteria and scalable test coverage across development phases.
Lead resolution of the most complex board-, system-, rack-, manufacturing-, and field-level issues by organizing cross-team debug, forming hypotheses from data, and driving verified corrective actions and prevention mechanisms. Provide technical direction to ODM/OEM and technology partners; define deliverables, design-review criteria, quality expectations, and escalation paths while influencing supplier roadmaps and execution.
Mentor senior engineers, raise engineering standards, and build reusable specifications, design guides, validation methods, reference architectures, and lessons learned across network-switch programs.
Master's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 7+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 8+ years technical engineering experience OR equivalent experience.
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field and 10+ years of technical engineering experience, or equivalent experience. 10+ years of experience designing and delivering board- or system-level hardware for networking, compute, storage, accelerator, or datacenter products across the hardware development lifecycle.
Experience leading architecture, requirements, design reviews, bring-up, validation, root-cause debug, and production readiness for complex hardware platforms. Experience developing high-speed serial and high-current power-delivery hardware and leading execution across electrical, firmware, mechanical, thermal, SI/PI, validation, manufacturing, and system-integration disciplines.
Experience providing technical leadership across internal organizations and external ODM/OEM, silicon, component, or manufacturing partners. Proven ability to identify architectural and execution risks, frame system tradeoffs, and drive decisions across performance, reliability, cost, schedule, and long-term platform value.
Experience architecting merchant-silicon Ethernet switch platforms for AI, cloud, hyperscale, or datacenter infrastructure. Deep experience with switch ASIC, CPU, BMC, CPLD/FPGA, clocking, reset, power-delivery, telemetry, and hardware-management architectures. Experience with 112G/224G PAM4, high-speed connectors, cable backplanes, retimers, pluggable optical modules, and end-to-end channel-budget tradeoffs.
Experience with SONiC hardware enablement, platform APIs, firmware interfaces, and switch-platform management. Demonstrated ability to assess SI/PI analyses, PCB and package constraints, PDN behavior, power transients, thermal interactions, and laboratory correlation data. Experience delivering hardware through architecture, EVT, DVT, PVT, production qualification, and high-volume manufacturing.
Experience defining supplier strategy, influencing technology roadmaps, and leading ODM/OEM execution across multiple concurrent programs. Proven technical communication, specification writing, executive-level decision framing, mentoring, and cross-organization influence.
From Microsoft's careers page, first listed on Rolev.ai on October 11, 2026. Rolev.ai is not the employer.
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Common questions
Where is the Principal Hardware Engineer - Networking job at Microsoft located?
This Principal Hardware Engineer - Networking position at Microsoft is located in Mountain View | United States, CA (On-site). Always check Microsoft's application page for specific state eligibility or relocation policies.
What qualifications are required for Principal Hardware Engineer - Networking at Microsoft?
For the Principal Hardware Engineer - Networking role, Microsoft highlights 10+ years of relevant experience; a bachelor's degree; experience with switch ASIC architecture, SI/PI analysis, 112G/224G PAM4, BMC and CPLD/FPGA design, SONiC hardware enablement. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the Principal Hardware Engineer - Networking position at Microsoft?
This listing links directly to Microsoft's application page. You can apply directly on Microsoft's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.