Principal/ Sr. Principal FPGA Design Engineer
- Location
- United States-Illinois-Rolling Meadows · On-site
- Job type
- Full-time
- Level
- Director
- Experience
- 5+ years
- Education
- Bachelor's degree
- Listed
- 15 days ago
Skills & highlights for this role
- FPGA design
- ASIC design
- VHDL and/or Verilog
- High-level synthesis with C++
- Timing closure on dense FPGA designs
- DSP structures and techniques
- Python, C, or other scripting languages
- Test bench generation
- FPGA design flow (RTL/gate simulation, synthesis, place and route, static timing analysis, power analysis)
- FPGA simulation tools
- Xilinx or Intel/Altera FPGA architectures and design tools
Also useful
- Signal processing experience
- Microsemi/Actel FPGA experience
- High-speed interface design
- RF and electro-optical DSP
- Digital subsystem and circuit card design
About the role
- RELOCATION ASSISTANCE: Relocation assistance may be available
- CLEARANCE REQUIRED FOR START: No
- CLEARANCE TYPE: None
- TRAVEL: Yes, 10% of the Time
About the role
At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon.
We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.
Embark on a career putting innovative, reliable, and agile products and ideas into orbit, and beyond. Northrop Grumman Space Systems has opportunities waiting for you that play a vital role in human space exploration, national defense, and scientific discovery, supporting multiple programs across the universe.
With us, you'll discover a culture of curiosity and collaboration that will have you Defining Possible from the day you start. Our space systems connect and protect millions of people on earth every day, now and for the future. Explore your future and launch your career with Northrop Grumman Space Systems today!
Our team is chartered with providing the skills, innovative technologies to develop, design, produce and sustain optimized product lines across the sector while providing a decisive advantage to the warfighter. Come be a part of our mission!
We are seeking a talented FPGA Design engineer with signal processing experience to join our growing team in Rolling Meadows, IL.
As an FPGA Design Engineer, you will join our diverse team and be responsible for research, requirements analysis and systems architecture, design, coding, test bench design, verification, synthesis and place & route for our digital signal processing products.
You will be working with digital subsystem and circuit card designs that utilize the latest FPGA technologies from all major vendors and device families including Xilinx, Intel (Altera), and Microsemi (Actel) and support high speed interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and processor interfaces.
Your expertise in digital signal processing, modeling and simulation, and circuit level design and test are desired for this position.
This position will be filled as a level 3 or level 4.
Basic Qualifications
- Principal FPGA Design Engineer (Level 3): Bachelors' degree in Electrical Engineering, Computer Engineering or similar engineering discipline with a minimum 5 years (or MS and 3+ years, or a PhD) of FPGA/ASIC design experience.
- Sr. Principal FPGA Design Engineer (Level 4): Bachelors' degree in Electrical Engineering, Computer Engineering or similar engineering discipline with a minimum 8 years (or MS and 6+ years, or PhD +3 years) of FPGA/ASIC design experience.
- In-depth knowledge of VHDL and/or Verilog
- -Proficiency in High level synthesis (Xilinx Vivado HLS AND/OR Mentor Catapult HLS) with C++
- Expertise achieving timing closure on dense FPGA designs
- Working knowledge of DSP structures and techniques
- Proficient in Python, C or other scripting languages
- Extensive experience generating test benches
- Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place and route, static timing analysis, and power analysis
- Experience with FPGA simulation tools to verify performance of complex RTL blocks
- Experience with Xilinx or Intel/Altera FPGA architectures and design tools
- Soft skills to include: Adaptive, creative, collaborative, comfortable working independently, enjoys solving difficult problems while communicating with all levels of an organization internally and externally
- Must be a US Citizen with ability to obtain and maintain Top Secret security clearance with SCI
Preferred Qualifications
- Current or Active Top Secret with SCI/SAP security clearance
- Extensive experience implementing Digital Signal or Image Processing algorithms on FPGAs
- Extensive experience with high-speed interfaces: Ex. AXI, PCIe, Xilinx Aurora, JESD, 10G Ethernet, etc.
- Working knowledge of SDR platforms and architectures
- Extensive experience developing FPGA algorithms for SoC based architectures
- Experience developing FPGA/SW interfaces and controls
- Experience developing and prototyping in MATLAB/Simulink
- Experience debugging down to the hardware level & experience using Signal Generators, Logic Analyzers, Digital Oscilloscopes and Embedded FPGA
- Debugging tools.
- Experience and knowledge developing requirements for FPGA-based products
- Experience with Electronic Design Automation (EDA) Tools: Mentor Graphics ModelSim/QuestaSim, Synplify, Xilinx ISE/ Vivado, Intel Quartus, Altera SOPC Builder, Altera Qsys, DSP Builder.
- Experience working with or developing test benches using SystemVerilog and Universal Verification Methodology (UVM)
- -Familiarity with revision control, documentation, planning, and review systems similar to GIT/SVN/ClearCase, DOORS, Jira/Rally/ClearQuest
Curious about all the exciting developments with the Northrop Grumman Space Sector? Click the link below:
- Working at Northrop Grumman is more than just a paycheck.
- We offer a comprehensive Total Rewards and benefits package designed to help you thrive at work and in life.
- For more information on our Total Rewards package, please visit our Total Rewards site.
Northrop Grumman Total Rewards
- #SpaceEngJobs
- #SpaceSoftwareJobs
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Primary Level Salary Range
$119,600.00 - $179,400.00
Secondary Level Salary Range
$149,300.00 - $223,900.00
The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.
Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.
The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.
Equal opportunity and legal notices
Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. Citizenship is required for all positions with a government clearance and certain other restricted positions.
From Ngc's careers page, first listed on Rolev.ai on October 26, 2026. Rolev.ai is not the employer.
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Common questions
Where is the Principal/ Sr. Principal FPGA Design Engineer job at Ngc located?
This Principal/ Sr. Principal FPGA Design Engineer position at Ngc is located in United States-Illinois-Rolling Meadows (On-site). Always check Ngc's application page for specific state eligibility or relocation policies.
What qualifications are required for Principal/ Sr. Principal FPGA Design Engineer at Ngc?
For the Principal/ Sr. Principal FPGA Design Engineer role, Ngc highlights 5+ years of relevant experience; a bachelor's degree; experience with FPGA design, ASIC design, VHDL and/or Verilog, High-level synthesis with C++, Timing closure on dense FPGA designs, DSP structures and techniques. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the Principal/ Sr. Principal FPGA Design Engineer position at Ngc?
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