Research Engineer, ML for EDA

Position Overview

We are hiring Research Engineers to apply machine learning to electronic design automation (EDA). Power, performance, and area are the central tradeoffs in chip design, and getting them right takes deep expertise and long iterations through EDA tools. You'll own research projects that apply ML to these problems across the design flow, from problem definition through data, modeling, and evaluation, and turn successful results into capabilities in the ChipAgents platform. You'll work alongside other ML researchers, software engineers, and hardware experts.

Key Responsibilities

• Lead research projects that apply machine learning to power, performance, and area problems in chip design, from problem definition to production.
• Build datasets and benchmarks from EDA tool flows across a range of designs and technologies.
• Design, train, and evaluate ML models on hardware design data.
• Form clear hypotheses, set strong baselines, and distinguish meaningful improvements from benchmark noise.
• Work with engineering and product teams to bring research results into the ChipAgents platform.
• Write well-architected, maintainable code that others can build on.

Qualifications

• MS or PhD in Computer Science, Electrical or Computer Engineering, or a related field, or equivalent research experience in industry.
• Strong ML fundamentals and hands-on experience designing, training, and debugging deep learning models in PyTorch or similar platforms.
• Working knowledge of the digital design flow, from RTL through synthesis, place and route, and timing and power analysis.
• Experience running and scripting EDA tools, commercial or open source.
• Strong Python software engineering skills and a record of writing research code that others build on.
• Ability to identify the crux of an ambiguous research problem, choose the experiments that matter, and explain results clearly to ML and hardware engineers.
• Self-directed and ambitious, with strong ownership and good judgment about when work is ready to ship.

Nice to Haves

• Publications at EDA venues such as DAC, ICCAD, MLCAD, or ISPD, or at ML venues such as NeurIPS, ICML, or ICLR.
• Prior work applying ML to EDA or chip design problems.
• Experience with ML on graphs or other structured data.
• Industry experience in physical design, timing closure, or power analysis.
• Experience with LLMs or agent systems.
• Experience running large-scale training or data generation on compute clusters.

What We Offer

• $150K/yr - $350K/yr base salary + equity. We are open to discuss above-scale compensation with exceptional candidates on a case-by-case basis.
• Unlimited PTO and full benefits (medical, vision, dental, 401k).
• Two engineering-centric offices with free parking, private gym, and free lunch, drinks and snacks.