Senior Compiler Engineer

Key responsibilities

• Develop new compiler features to improve overall hardware efficiency while maintaining programmability. These may relate to:
• Efficient's new dataflow ISA
• Memory analysis and ordering Hardware constraints such as timing and power consumption
• Place-and-route of applications onto Efficient's fabric
• Visualization
• Programmer debugging tools
• Write unit and integration tests to uncover functional- and performance-related compiler bugs.
• Work with various machine-learning frameworks to compile models to our custom hardware.
• Debug and fix functional and performance issues of the compiler system.
• Collaborate with the hardware and physical design team to understand and improve hardware architecture and propose future improvements.
• Work closely with the application development team to understand the problem domain and deliver optimized compiler solutions.

Required qualifications & experience requirements

• 6+ years of experience with C++.
• Bachelor's/Master's degree in CS or related field.
• Familiarity with compiler frameworks such as GCC, LLVM, and/or MLIR.
• Understanding of computer architecture and optimization.
• Experience using industry standard development and debugging tools including GDB.
• Strong attention to detail, good work ethic, ability to work on multiple projects simultaneously, and good communication skills.
• Good problem solving skills.

Additional qualifications considered

• Familiarity with FPGA-compilation and/or PnR algorithms.
• Experience with verilog, system verilog, or VHDL.
• Knowledge of computer architecture.

Pay and benefits

We offer a competitive base salary for this role, generally ranging from $160,000 to $230,000, plus a 10% annual bonus, meaningful equity, and comprehensive benefits. Final compensation will depend on experience, level, and location, with flexibility for the right candidate.