Senior Electrical Engineer

What you will be doing

As a Senior Electrical Engineer II at Neros, you will be a core technical contributor on our production electronics team, leading complex hardware projects from requirements through production release. You bring broad design experience across mixed-signal and high-speed digital systems, a track record of first-pass hardware success, and the collaborative instincts to help elevate the engineers around you. This is a role for someone who takes deep ownership of their designs, executes to a consistently high standard, and is extending their impact beyond their own work through project leadership and mentorship.

Responsibilities

• Lead detailed electrical design on complex production systems, from schematic capture through layout oversight and design verification
• Contribute to system architecture discussions and translate requirements into detailed hardware specifications
• Perform schematic capture for assigned subsystems and actively guide PCB layout to meet signal integrity, power integrity, thermal, and EMC requirements
• Conduct worst-case circuit analysis, component derating, and design margin reviews as a standard part of the design process
• Apply DFM, DFT, and DFR practices throughout the design lifecycle to ensure reliability and manufacturability at volume
• Participate in design reviews and contribute to technical sign-off on hardware designs, V&V plans, and product releases
• Mentor junior and mid-level engineers, sharing technical knowledge, and helping build strong design practices within the team
• Collaborate with firmware, mechanical, and systems teams to resolve cross-disciplinary design challenges

You should have the following

• 5+ years of experience in electrical hardware design, with expertise in mixed-signal design, high-speed digital design, and embedded systems
• Demonstrated track record of taking products from concept through production, with a consistent history of first-pass hardware success
• Strong proficiency in schematic capture (Altium preferred) with a history of producing accurate, well-documented, complex designs
• Solid understanding of PCB layout principles for high-speed digital, power, and mixed-signal systems, with experience guiding layout to meet SI/PI and EMC requirements
• Worst-case circuit analysis and component derating practiced as standard design methodology
• Experience with DFM, DFT, and EMC/EMI disciplines with a record of shipping reliable hardware at volume
• Proficiency with high-speed serial interfaces (PCIe, MIPI CSI-2, USB 3.x, LVDS) and their associated signal integrity considerations
• Experience providing mentorship and technical guidance to team members
• Clear communication skills, with the ability to document designs thoroughly and contribute meaningfully in cross-functional design reviews
• Bachelor's degree in electrical engineering or a related field

Nice to have

• RF and wireless system design experience, including antenna design, RF front-end architecture, and link budget analysis (highly desirable given the nature of our products)
• Experience with LoRa, FHSS, or similar long-range wireless technologies
• Background in UAV, avionics, robotics, or other demanding applications where hardware reliability and operational environment are critical considerations
• FPGA design experience within embedded hardware platforms
• Familiarity with multi-physics simulation tools (Ansys SIwave, HyperLynx, or similar) for signal integrity and power delivery network analysis
• Familiarity with MATLAB/Simulink for system-level modeling
• Master of Science in Electrical Engineering or a related field

Pay and benefits

The salary range for this role is an estimate based on a wide range of compensation factors, inclusive of base salary only. Actual salary may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations. Highly competitive equity grants are considered part of Neros' total compensation package.

Neros posts external titles (e.g., "Engineer II," "Senior I") to reflect true leveling and compensation, but internal titles don't include level numbers - your internal title will be the base title only ("Engineer" or "Senior Engineer," as applicable).