Senior Principal Power Management Architect

About the role

Define the end-to-end power-management architecture for complex silicon, firmware, operating-system, and platform environments. Develop power-optimization strategies that balance energy efficiency, performance, thermals, reliability, and product cost.

Architect and guide implementation of low-power features, including dynamic voltage and frequency scaling, clock and power gating, idle-state management, workload-aware controls, and power-state transitions. Specify power-management software, firmware interfaces, policies, control loops, and algorithms for real-time and predictive optimization.

Establish requirements for voltage, temperature, process, current, activity, and performance sensors; define their placement, calibration, accuracy, telemetry, and control-system integration. Define the SoC power and performance telemetry architecture, including data models, collection paths, aggregation, accuracy, sampling, and interfaces to platform-management and fleet-level telemetry stacks.

Review and optimize platform voltage-regulator architecture, including rail partitioning, regulator selection, efficiency, transient response, telemetry, sequencing, control interfaces, and alignment with silicon power-state and workload requirements. Lead thermal-management strategies informed by power-optimization results, silicon characterization, workload behavior, and platform constraints.

Define methodologies for thermal design power estimation, measurement, correlation, guard-banding, and validation across pre-silicon and post-silicon environments. Use representative benchmarks and workload suites to characterize performance-per-watt, identify bottlenecks, tune policies, and validate power and performance targets.

Partner with architecture, RTL, physical design, validation, firmware, operating-system, performance, thermal, mechanical, and product teams to drive solutions from concept through production. Conduct technical reviews, communicate tradeoffs to senior stakeholders, mentor engineers, and influence roadmap decisions through data-driven recommendations.

Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 7+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 10+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 12+ years technical engineering experience OR equivalent experience.

This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information.

To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. Extensive industry experience in silicon or system power architecture, with demonstrated technical leadership across multiple product generations.

Expert-level understanding of power-management architecture, power optimization, low-power design and implementation techniques, and hardware-software co-design. Deep experience with power-management firmware, software policies, management algorithms, feedback-control techniques, telemetry, and workload-aware optimization.

Expertise in sensor technologies used for voltage, temperature, process, current, activity, and thermal monitoring, including calibration, accuracy, noise, sampling, and system-level use. Understanding of thermal management, power delivery, silicon operating limits, reliability considerations, and the relationship between power, performance, voltage, frequency, and temperature.

Demonstrated experience with TDP estimation and measurement, power modeling, silicon characterization, data correlation, and production validation. Solid understanding of benchmark selection and utilization for performance optimization, power-performance analysis, workload characterization, and performance-per-watt evaluation.

Ability to develop clear architectural specifications and to communicate complex technical decisions to engineering teams and executive stakeholders. Advanced degree in electrical engineering, computer engineering, computer science, or a related field. Experience architecting power management for CPUs, GPUs, accelerators, memory subsystems, interconnects, I/O, or heterogeneous system-on-chip designs.

Knowledge of pre-silicon modeling, emulation, post-silicon bring-up, telemetry analytics, and automated tuning or optimization frameworks. Experience working across hardware, firmware, operating systems, drivers, platform management, and datacenter or high-performance computing environments.

Track record of technical innovation demonstrated through patents, publications, standards participation, or delivery of differentiated production features.