Senior Quantum Design Verification Engineer
- Location
- Redmond, WA
- Job type
- Full-time
- Level
- Senior
- Experience
- 6+ years
- Education
- Master's degree
- Listed
- 29 days ago
Skills & highlights for this role
- TS/SCI clearance
- SoC verification
- SystemVerilog
- analog mixed-signal simulation
- Python
Also useful
- MATLAB
- Perl
- AI-assisted verification
About the role
Your responsibilities will include defining pre-silicon Simulation, post-silicon Validation/Characterization plans for SoC/ intellectual property (IP), and coordinating and driving individuals, contingent staff and external vendors towards creating a high-quality design.
Own and create verification environments and tests for IP level and SoC level designs, validate designs in simulation with both pre and post layout Register Transfer Level (RTL) / netlists. Setup Databases, flows for SoC/IP repositories, manage them. Setup Bug-Tracking systems, log/track/manage/close bugs/issues.
Drive Milestone reviews, reports/status Create testplans for pre-silicon simulation verification, including for both digital and analog components; and performing Analog Mixed Signal Simulation models. Collaborate with Design for Test (DFT) team to test DFT features Align verification methodologies with wider teams and drive continuous improvement to the Design Verification development processes for at scale execution.
Collaborate effectively with architects, analog mixed-signal designers, verification engineers, physical design and DFT teams and other front-end designers. Other Embody our culture and values.
Doctorate in Physics, Engineering, or related field AND 1+ year(s) experience in industry or in a research and development environment, could include completion of a post doctoral research position OR Master's Degree in Physics, Engineering, or related field AND 4+ years experience in industry or in a research and development environment OR Bachelor's Degree in Physics, Engineering, or related field AND 6+ years experience in industry or in a research and development environment OR equivalent experience.
Degree (BSEE/MSEE/PhD) in Electrical Engineering or related field 6+ years of experience in design verification with a proven track record of full verification cycle on complex SoC IPs and/or systems.
In depth knowledge of verification principles, testbenches, stimulus generation Substantial background in creating simulation environments, developing tests, and debugging designs Solid understanding of chip and/or computer architecture Solid understanding of Analog/Digital interface verification, including modeling of Analog components as required.
Scripting language such as Python, Ruby, or Perl Experience writing tests in C and C++ Effective communication, collaboration and teamwork skills and ability to contribute to diverse and inclusive teams. Artificial Intelligence (AI)-assisted solutions into verification flows and reporting to improve productivity and quality.
Matlab Modeling Familiarity with Analog Mixed-Signal modeling and simulations Visual Studio Code Silicon Characterization of Analog Mixed-Signal blocks and release to production Automation of simulation and data analysis environments using scripting languages or tools such as MATLAB/Python.
Ability to leverage AI tools to drive innovation and efficiency (e.g., performance modeling and analysis, research gathering, day to day task automation). Ability to work in an “AI-first” environment using modern AI tools to accelerate discovery through hardware development.
From Microsoft's careers page, first listed on Rolev.ai on October 11, 2026. Rolev.ai is not the employer.
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Common questions
Where is the Senior Quantum Design Verification Engineer job at Microsoft located?
This Senior Quantum Design Verification Engineer position at Microsoft is located in Redmond, WA. Always check Microsoft's application page for specific state eligibility or relocation policies.
What qualifications are required for Senior Quantum Design Verification Engineer at Microsoft?
For the Senior Quantum Design Verification Engineer role, Microsoft highlights 6+ years of relevant experience; a master's degree; experience with SoC verification, SystemVerilog, analog mixed-signal simulation, Python. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the Senior Quantum Design Verification Engineer position at Microsoft?
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