Selinc
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Senior VHDL RTL Digital Logic Engineer

Pay
$145,000 – $214,000 per year
Location
Pullman, WA
Listed
18 days ago

About the role

Schweitzer Engineering Laboratories, Inc. (SEL) designs, manufactures, and installs world-class products and solutions for use in critical infrastructure, making electric power safer, more reliable, and more economical. SEL is hiring a Senior Engineer with a focus in VHDL Register-Transfer Level (RTL) Digital Logic design for our R&D Communications product group. In this role, you will develop and support our Ethernet Security Gateways, Satellite Synchronized Network Clocks, Ethernet Switches, and other communication products.

As a Senior VHDL RTL Digital Logic Engineer, a typical day may include the following:

  • Serving as technical lead on complex VHDL RTL digital logic projects.
  • Creating and maintaining internal RTL design documentation.
  • Writing test plans and developing test harnesses/stimulus for RTL functional verification.
  • Preparing design and system level specifications.
  • Participating or moderating peer reviews of designs, documentation and test plans.
  • Providing and maintaining accurate project plans and labor estimates.
  • Working closely with product managers on new product concepts and enhancements.
  • Engaging with cross-discipline teams to deliver world-class products for critical infrastructure.
  • This job may be a good fit if you…
  • are passionate about designing RTL digital logic for FPGAs.
  • enjoy solving difficult problems with efficient and creative solutions.
  • have experience in both RTL, hardware and firmware development practices.
  • are knowledgeable in networking/Ethernet (IEEE 802.3) and precise timing technologies such as PTP (IEEE 1588) and IRIG-B.
  • want a career making electric power safer, more reliable, and more economical.

Required Qualifications

  • B.S. degree in Electrical Engineering, related discipline, or equivalent combination of education and experience - 8+ years of combined experience in at least 2 of the following areas:
  • RTL Digital Design with FPGAs using VHDL/Verilog
  • Xilinx, Intel FPGA (Altera), Microchip (Microsemi/Actel), Lattice Semiconductor Tools
  • Firmware Design with FPGA SOCs/Microprocessors using C/C++
  • Simulation, Synthesis and Timing Analysis of Digital Logic
  • Functional verification of RTL Digital Logic
  • Ability to work cooperatively in a team environment
  • Ability to rapidly learn new skills and assume new responsibilities
  • Ability to mentor others
  • Strong writing, technical documentation and speaking
  • Background check results satisfactory to SEL
  • Negative drug test result(s)

Preferred Qualifications

  • Supervisory experience or training
  • Strong project management knowledge and skills

Location

  • Pullman, WA- This position is located in Pullman, WA.
  • Nestled in Eastern Washington, offering an exceptional quality of life.
  • Embrace the charm of small-town living with spacious surroundings, no traffic hassles, and easy access to outdoor adventures in nearby mountains, rivers, and forests.
  • Plus, benefit from excellent schools and universities in the area.

#IND5

Pay and benefits

Competitive pay. Superior benefits. Inspiring work.

People are at the core of our company and we hire employee-owners. We welcome you to learn more about how we support employees.

  • We’re 100% employee owned. Retirement benefits include an employer funded stock ownership plan (ESOP) and personal 401(k) options.
  • We offer top tier medical, prescription, dental, vision, life, and disability insurance.
  • We recognize the importance of a healthy life balance and offer: 10 paid holidays, annual vacation accrual starting at 12 days, 9 paid sick days, and paid family and medical leave that covers 90% of your pay.
  • We foster growth and development of our employees through avenues such as STEM courses, apprenticeships, tuition assistance, and engineering development programs.
  • Ask our team about other benefits including wellness, fertility, adoption, and flexible spending benefits.

Pay Range Data

We anticipate filling this position as a Development Lead Hardware Engineer $145,000 - $214,000 per year. We are open to reviewing additional candidates with more or less experience and the pay range may differ if filled at a different level. Our pay ranges are determined by job and responsibility. We base our starting pay offer and title on job-related factors such as candidate experience, training, knowledge, and skills.

Communication with Applicants

We communicate with all applicants. If you do not receive a response about your application, please check your SPAM filter or reach out to us at.

SEL is an Equal Opportunity Employer: Vets/Disabled.

Read the original posting

From Selinc's careers page, first listed on Rolev.ai on October 23, 2026. Rolev.ai is not the employer.

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Common questions

What is the salary for the Senior VHDL RTL Digital Logic Engineer role at Selinc?

The Senior VHDL RTL Digital Logic Engineer posting at Selinc states compensation of $145,000 – $214,000 per year. Final pay may depend on location, experience, and interview evaluation on Selinc's official career site.

Where is the Senior VHDL RTL Digital Logic Engineer job at Selinc located?

This Senior VHDL RTL Digital Logic Engineer position at Selinc is located in Pullman, WA. Always check Selinc's application page for specific state eligibility or relocation policies.

How do I apply for the Senior VHDL RTL Digital Logic Engineer position at Selinc?

This listing links directly to Selinc's Workday application page. You can apply directly on Selinc's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the Workday application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.