SerDes Circuit Design Engineer
- Location
- Beaverton, OR · On-site
- Job type
- Full-time
- Level
- Mid-level
- Listed
- 29 days ago
Skills & highlights for this role
- analog mixed-signal design
- high-speed SerDes
- CDR architectures
- SystemVerilog
- Tx/Rx equalization (CTLE, DFE)
Also useful
- Verilog-AMS
- FinFET technology
- PCIe
- USB
Summary
We are seeking talented Analog Mixed-Signal designers to join our high-speed SerDes team! Our team specializes in building next generation high-performance wireline transceivers delivering intellectual-property (IP) for Apple’s world-leading system-on-chip (SOC).
In this role, you will actively work with cross-functional Analog Mixed-Signal design teams to create and execute on state-of-the-art IPs key to Apple’s products. You will be challenged to make the best-in-class designs to surprise and delight Apple customers. With redefining the user experience in focus, you will get an opportunity to work on designs which makes the best systems. This enables you to learn end-to-end system while exceeding the highest expectations of quality, innovation and efficiency.
If you have strong fundamentals and a track record of tackling technical challenges, you are passionate about learning new skills and improving the value of your work, and you like to be tuned to the bigger-picture while diving deeply into the details to innovate and tackle problems- we invite you to join and grow with our team!
About the role
You will work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, high-speed analog signal chain, mixed-signal calibration and algorithms) with best in class power, performance, and area (PPA).
You will work with cross-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create block-level specifications and execute on transistor-level implementation and behavioral modeling. You will drive mask design to implement layout view of designs. You will closely work with SOC teams to deliver IP views and make sure they meet the quality standards. While developing these complex IPs, on regular basis you will interact with your peers/management to communicate progress and discuss new ideas making it a lively and interactive work environment.
Preferred Qualifications
- Deep understanding of analog mixed-signal design with experience in high-speed serial links.
- Understanding and experience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters
- Understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques
- Good grasp and understanding of digitally assisted analog design concepts (e.g. background calibrations, LMS based adaptive loops)
- Experience with high-speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.) with solid understanding of digital design concepts
- Knowledge of Tx/Rx equalization techniques and circuits (e.g. CTLE, DFE, de-emphasis) for 64+ Gbps NRZ and PAM applications
- Knowledge of CDR architectures and implementations
- Knowledge of lab equipment and testing
- Experience in Analog Mixed Signal circuit modeling and performance evaluation (e.g. SystemVerilog, Matlab, Python, VerilogAMS)
- Hands-on experience in advanced CMOS technologies, design with FinFet technology
- Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization
- Concepts of timing closure and related industry tools (e.g., Nanotime, Primetime)
- Experience in lab testing of high-speed serial I/O, debug and data analysis techniques
- Knowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY)
- Skills in scripting and automation to enhance efficiency are highly desirable
From Apple's careers page, first listed on Rolev.ai on October 12, 2026. Rolev.ai is not the employer.
How Rolev.ai helps with this application
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Common questions
Where is the SerDes Circuit Design Engineer job at Apple located?
This SerDes Circuit Design Engineer position at Apple is located in Beaverton, OR (On-site). Always check Apple's application page for specific state eligibility or relocation policies.
What qualifications are required for SerDes Circuit Design Engineer at Apple?
For the SerDes Circuit Design Engineer role, Apple highlights experience with analog mixed-signal design, high-speed SerDes, CDR architectures, SystemVerilog, Tx/Rx equalization (CTLE, DFE). Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the SerDes Circuit Design Engineer position at Apple?
This listing links directly to Apple's application page. You can apply directly on Apple's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.