Cadence
SemiconductorsDirect Workday career site

SerDes IP Systems Engineering Director

Pay
$178,500 – $331,500 per year
Location
San Jose, CA · On-site
Job type
Full-time
Level
Director
Experience
10+ years
Listed
30 days ago

Skills & highlights for this role

  • SerDes architecture
  • MATLAB
  • Simulink
  • statistical link analysis
  • IBIS-AMI modeling

Also useful

  • UCIe
  • ADS
  • Perl
  • signal integrity

Stated benefits & perks

  • 401k match
  • Health
  • Dental
  • Vision

Responsibilities

Develop statistical and linear systems analysis of the link, model nonidealities and determine design specifications for circuit designers Key contributor and driver of the R&D team that defines, models and analyzes high performance D2D SerDes IP microarchitecture, link budget and specifications Develop infrastructure to ensure robust product development, systems modeling analysis and testing Drive and verify end-to-end link simulations using statistical and time-domain simulators (Simulink, ADS, etc.)

Develop and provide guidelines regarding signal integrity and power integrity to customers Support customer package/board design and debug as necessary Guide the package design team based on in-package D2D link channel analysis Generate technical specification, data sheets, and application notes Update R&D team with the latest standards developments, customer feedback and competitive analysis Position

Pay and benefits

10+ years of experience working with high speed high performance SerDes and PHYs Deep understanding of high speed SerDes architecture Proficient in MATLAB, Simulink, ADS, or similar link analysis/statistical analysis tool Strong coding skills for simulation and modelling, as well as data analysis Strong mathematical skills, in particular relating to linear systems (Fourier analysis, filter theory, etc.)

Must have strong group presentation and leadership skills PhD or M.S. in Electrical/Computer Engineering (or similar degree) The ability to think through engineering systems end-to-end and identify bottlenecks and weak points. Deep knowledge of communication systems fundamentals and wireline communications Good experimental skills Good knowledge of signal processing (DSP) algorithms and architecture.

Good working knowledge of physics of signal propagation Good working knowledge of basic circuits Experience generating systems or IBIS-AMI models Experience using system simulation tools, especially Matlab, Perl, and other scripting tools Demonstrated capacity to self-educate themselves to pick up new fields of expertise D2D link experience is preferred but not required Familiarity with emerging D2D standards such as UCIe is desired Strong debug and problem-solving skills The annual salary range for California is $178,500 to $331,500.

You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.

Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We're doing work that matters. Help us solve what others can't.

About Cadence

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. SerDes IP Systems Engineering Director Description: This is a unique opportunity to join the rapidly growing Die-to-Die Interface IP team in the Silicon Solutions R&D Group at Cadence Design Systems. We are looking for a Systems Engineering Director who will be a key driver and contributor to the development of our advanced D2D SerDes IP products. This role involves leading the D2D Systems analysis team as well as contributing with hands on technical development. Main Job Tasks and

Read the original posting

From Cadence's careers page, first listed on Rolev.ai on October 10, 2026. Rolev.ai is not the employer.

How Rolev.ai helps with this application

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Common questions

What is the salary for the SerDes IP Systems Engineering Director role at Cadence?

The SerDes IP Systems Engineering Director posting at Cadence states compensation of $178,500 – $331,500 per year. It is listed as a full-time position. Final pay may depend on location, experience, and interview evaluation on Cadence's official career site.

Where is the SerDes IP Systems Engineering Director job at Cadence located?

This SerDes IP Systems Engineering Director position at Cadence is located in San Jose, CA (On-site). Always check Cadence's application page for specific state eligibility or relocation policies.

What qualifications are required for SerDes IP Systems Engineering Director at Cadence?

For the SerDes IP Systems Engineering Director role, Cadence highlights 10+ years of relevant experience; experience with SerDes architecture, MATLAB, Simulink, statistical link analysis, IBIS-AMI modeling. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.

How do I apply for the SerDes IP Systems Engineering Director position at Cadence?

This listing links directly to Cadence's Workday application page. You can apply directly on Cadence's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the Workday application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.