Sr. Design Verification Engineer - Fabric Interconnect Performance
- Location
- Raleigh | United States, NC · On-site
- Job type
- Full-time
- Level
- Director
- Experience
- 5+ years
- Education
- Bachelor's degree
- Listed
- 28 days ago
Skills & highlights for this role
- UVM
- formal verification
- Python
- PCIe
- CXL
- AMBA CHI
Also useful
- AI-assisted verification tools
- assertion-based verification
- CHI coherency
About the role
The candidate for this position will be expected and able to complete the following responsibilities upon hire: Own performance verification of Fabric Interconnect subsystems, including traffic management, QoS, latency, bandwidth, and congestion scenarios. Partner with architecture, design, and verification teams to define verification strategies, test plans, and signoff criteria.
Develop performance analytics, monitors, scoreboards, heat maps, and visualization tools to assess design behavior and identify bottlenecks. Develop and enhance UVM and/or Formal verification environments, infrastructure, and reusable collateral. Drive bug discovery and root-cause analysis through simulation, formal analysis, assertions, coverage, and debug.
Improve verification productivity through automation, methodologies, and AI-driven solutions. Coach and mentor engineers in verification methodologies and best practices.
Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience OR equivalent experience.
This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information.
To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.
Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience.
Experience with performance verification of complex IPs, subsystems, or SoCs, including latency, bandwidth, QoS, congestion management, or traffic analysis. Demonstrated understanding of one or more of the following: fabric interconnects, coherency, CHI, AMBA, PCIe, CXL, protocol bridges, or memory subsystems.
Experience developing performance monitors, scoreboards, analytics, heat maps, or visualization tools for debug and performance signoff. Experience developing and maintaining UVM verification environments, assertions, checkers, and coverage models. Experience with Formal Verification and assertion-based verification methodologies. Proficiency with Python or similar scripting languages for automation and data analysis.
Experience applying AI-assisted tools to engineering and verification workflows.
Equal opportunity and legal notices
As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C.
From Microsoft's careers page, first listed on Rolev.ai on October 11, 2026. Rolev.ai is not the employer.
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Common questions
Where is the Sr. Design Verification Engineer - Fabric Interconnect Performance job at Microsoft located?
This Sr. Design Verification Engineer - Fabric Interconnect Performance position at Microsoft is located in Raleigh | United States, NC (On-site). Always check Microsoft's application page for specific state eligibility or relocation policies.
What qualifications are required for Sr. Design Verification Engineer - Fabric Interconnect Performance at Microsoft?
For the Sr. Design Verification Engineer - Fabric Interconnect Performance role, Microsoft highlights 5+ years of relevant experience; a bachelor's degree; experience with UVM, formal verification, Python, PCIe, CXL, AMBA CHI. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the Sr. Design Verification Engineer - Fabric Interconnect Performance position at Microsoft?
This listing links directly to Microsoft's application page. You can apply directly on Microsoft's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.