Annapurna Labs (U.S.) Inc.
Direct employer career site

Sr. PD Methodology Engineer, Annapurna Labs - Cloud Scale Machine Learning

Pay
$185,200 – $287,500 per year
Location
Cupertino, CA
Listed
3 days ago

About the role

Annapurna Labs (our organization within Amazon Utility Computing) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.

Amazon provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world. We have data center locations in the U.S., Europe, Singapore, and Japan, and customers across all industries.

Custom SoCs (System on Chip) live at the heart of Amazon Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you'll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, Trainium Systems (our custom designed machine learning inference and training datacenter servers).

Our success depends on our world-class server infrastructure; we're handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.

Key job responsibilities

  • Define, develop and deploy innovative physical design and verification methodologies (RTL2GDS) for ML Accelerator chips in advanced nodes
  • Drive Optimizations in CAD flows/methodologies for PPA and TAT improvements
  • Work with EDA tool vendors to evaluate new methods, resolve bugs, improve usability.
  • Fine tune cloud infrastructure to improve compute and storage utilization for physical design work.
  • Interface directly with RTL, Physical Design, Package Design, DFT teams to improve methodologies and efficiencies.
  • Be able to independently troubleshoot digital tool flow usage and deploy solutions;
  • Fluent in scripting languages such as TCL, Python, etc. and able to build scalable and efficient flows to support parallel design developments
  • Create Dashboard and Central reports for project tracking and visualizing QoR/stats

Basic Qualifications

  • 7+ years of ASIC implementation, synthesis, STA and physical design in deep sub-micron nodes (16nm or smaller) experience
  • Bachelor's degree in Electrical Engineering or a related field
  • Knowledge of implementing chips with multiple power islands and power gating
  • Experience leading or solely developing methodology and scripts for physical synthesis
  • Experience low power design techniques
  • Experience leading technical initiatives and key deliverables
  • Experience with version control systems and CI/CD pipeline implementation

Preferred Qualifications

  • Master's degree or Ph.D. degree in Electrical Engineering or related field
  • Experience in RTL coding and debug, as well as performance, power, area analysis and trade-offs

Additional information

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If the country/region you're applying in isn't listed, please contact your Recruiting Partner.

Pay and benefits

The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave.

USA, CA, Cupertino - 213,000.00 - 287,500.00 USD annually

USA, TX, Austin - 185,200.00 - 250,000.00 USD annually

Read the original posting

From Annapurna Labs (U.S.) Inc.'s careers page, first listed on Rolev.ai on November 6, 2026. Rolev.ai is not the employer.

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Common questions

What is the salary for the Sr. PD Methodology Engineer, Annapurna Labs - Cloud Scale Machine Learning role at Annapurna Labs (U.S.) Inc.?

The Sr. PD Methodology Engineer, Annapurna Labs - Cloud Scale Machine Learning posting at Annapurna Labs (U.S.) Inc. states compensation of $185,200 – $287,500 per year. Final pay may depend on location, experience, and interview evaluation on Annapurna Labs (U.S.) Inc.'s official career site.

Where is the Sr. PD Methodology Engineer, Annapurna Labs - Cloud Scale Machine Learning job at Annapurna Labs (U.S.) Inc. located?

This Sr. PD Methodology Engineer, Annapurna Labs - Cloud Scale Machine Learning position at Annapurna Labs (U.S.) Inc. is located in Cupertino, CA. Always check Annapurna Labs (U.S.) Inc.'s application page for specific state eligibility or relocation policies.

How do I apply for the Sr. PD Methodology Engineer, Annapurna Labs - Cloud Scale Machine Learning position at Annapurna Labs (U.S.) Inc.?

This listing links directly to Annapurna Labs (U.S.) Inc.'s application page. You can apply directly on Annapurna Labs (U.S.) Inc.'s site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.