TPM Lead
- Location
- Mountain View | New York · On-site
- Job type
- Full-time
- Level
- Director
- Experience
- 10+ years
- Listed
- 18 days ago
Skills & highlights for this role
- Semiconductor development experience
- Technical program management on ASIC or SoC architectures
- Schedule ownership across silicon development lifecycle
- Stakeholder management and influence without authority
- Executive-level technical communication
- Managing internationally distributed engineering teams
- Program management tools (Jira, Asana, or Linear)
- Silicon lifecycle experience from architecture through post-silicon validation
Also useful
- Chiplet and 3D packaging familiarity
- Expert-level Linear program management
- Heterogeneous systems for AI inference
- Experience with external silicon foundries, Tier II vendors, and OSAT vendors
- Silicon startup experience
- Hardware/software integration experience
Normal Computing | Build with US
Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
The Role
In partnership with our engineering leads, you will break down company objectives into actionable milestones across the engineering org. You will own the schedule across the entire silicon development lifecycle. You will surface information in a digestible format so that engineering executives are acutely aware of the current state of the project. You will also help to resolve issues across teams. Your work will ensure we ship on time.
What You Will Own
- Break down company objectives into actionable milestones across the engineering org.
- Own the schedule across the silicon development cycle: architecture, micro-architecture, RTL generation, verification, logic synthesis, design for test, physical design, physical verification, tapeout, packaging, post-silicon testing, bring-up and post-silicon validation.
- Coordinate these efforts across our teams in Mountain View, New York, London, Zurich and Copenhagen.
- Define metrics, create dashboards and other mechanisms to surface information and track progress.
- Identify and mitigate risks to delivery schedules and quality.
- Synthesize complex technical status, trade-offs, and risks into clear updates for executive leadership.
What Makes You a Great Fit
- 10+ years in semiconductor development, including 3+ years as a TPM or program lead on complex ASIC or SoC architectures.
- Excellent communication and stakeholder management skills; ability to influence without authority.
- Experience in companies with complex software/hardware integration.
- Proven track record managing internationally distributed engineering teams.
- Proficiency with program management tools such as Jira, Asana or Linear.
- Experience with every element of the silicon life-cycle from architecture and RTL generation to verification, tapeout, bring-up and post-silicon validation.
- Ability to think out-of-the-box to find solutions.
Bonus Points
- Ph.D. in an electrical engineering discipline.
- Familiarity with chiplets and 3D packaging.
- Expert at using Linear for program management tracking.
- Familiarity with heterogeneous systems used for AI inference.
- Experience working with external silicon foundries, Tier II vendors and OSAT vendors.
- Experience working at a silicon startup.
Equal opportunity and legal notices
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at.
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice
From Normal Computing Corporation's careers page, first listed on Rolev.ai on October 22, 2026. Rolev.ai is not the employer.
How Rolev.ai helps with this application
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Common questions
Where is the TPM Lead job at Normal Computing Corporation located?
This TPM Lead position at Normal Computing Corporation is located in Mountain View | New York (On-site). Always check Normal Computing Corporation's application page for specific state eligibility or relocation policies.
What qualifications are required for TPM Lead at Normal Computing Corporation?
For the TPM Lead role, Normal Computing Corporation highlights 10+ years of relevant experience; experience with Semiconductor development experience, Technical program management on ASIC or SoC architectures, Schedule ownership across silicon development lifecycle, Stakeholder management and influence without authority, Executive-level technical communication, Managing internationally distributed engineering teams. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the TPM Lead position at Normal Computing Corporation?
This listing links directly to Normal Computing Corporation's Ashby application page. You can apply directly on Normal Computing Corporation's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the Ashby application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.