Architect Labs Jobs
Open positions at Architect Labs, newest first. Each listing links to the company's own application page.
- Open positions
- 13
Newest Architect Labs openings
Special Projects
Direct ATSPalo Alto · 6 days ago
As a member of Special Projects at Architect, you'll work closely with the founders and leadership team to tackle the company's highest-priority business challenges.
Vice President of ASIC Engineering
Direct ATSPalo Alto · 11 days ago
Own the ASIC methodology and end-to-end delivery of ambitious AI compute silicons, from microarchitecture and RTL through verification, physical design, signoff, and tapeout.
Chief Architect
Direct ATSPalo Alto · 11 days ago
Define the architectural vision for new generation of AI compute silicons, and reinvent how architectures are discovered, explored and co-optimized with AI.
Palo Alto, CA (On-site) · 30 days ago
As our first Physical Design engineer, you'll build the PD function from scratch and extend our AI system from spec-to-netlist to tapeout-ready GDS.
- Full-time
- Mid-level
- physical design
- netlist-to-GDS flow
- timing closure
Palo Alto, CA (On-site) · 30 days ago
As a Member of the Technical Staff on the RTL Design team at Architect, you’ll own the AI-driven microarchitecture and RTL design of the memory subsystem going into production silicon.
- Full-time
- Senior
- 5+ years
- SystemVerilog
- DDR5/LPDDR5X
- HBM3
Palo Alto, CA (On-site) · 30 days ago
As a Member of the Technical Staff - Formal Methods at Architect Labs, you'll work on the formal foundations of our chip design flow.
- Full-time
- Mid-level
- TLA+
- Lean
- Coq
Palo Alto, CA (On-site) · 30 days ago
As a Member of the Technical Staff at Architect, you'll be at the forefront of training AI models for chip design, verification and exploration tasks.
- Full-time
- Senior
- reinforcement learning
- LLM fine-tuning
- PyTorch
Member of Technical Staff - Software
Direct ATSPalo Alto, CA · 30 days ago
As Member of the Technical Staff - Software at Architect, you’ll build the core platform that powers AI-driven chip design.
- Full-time
- Mid-level
- TypeScript
- Python
- RESTful API design
Palo Alto, CA (On-site) · 30 days ago
As a Member of the Technical Staff (Applied AI) at Architect, you'll sit at the intersection of chip design and frontier AI - translating deep hardware engineering expertise into agentic…
- Full-time
- Mid-level
- Python
- TypeScript
- RTL design
Palo Alto, CA (On-site) · 30 days ago
As a Member of Technical Staff - Formal Verification Engineer at Architect Labs, you'll own formal verification of the AI-generated chip design artifacts, from early specifications through…
- Full-time
- Mid-level
- SystemVerilog
- SVA
- Cadence Jasper
Palo Alto, CA (On-site) · 30 days ago
As a Member of the Technical Staff on the Design Verification & Validation team at Architect, you'll own the verification strategy behind AI-generated designs taping out on leading…
- Full-time
- Senior
- 5+ years
- SystemVerilog
- UVM
- AMBA protocols (AXI, ACE)
Palo Alto, CA (On-site) · 30 days ago
As a Research Intern at Architect, you will spend 3 months working alongside the founding team to push the boundaries of how AI models explore and optimize hardware designs.
- Part-time
- Entry level
- reinforcement learning
- PyTorch
- Python
Palo Alto, CA (On-site) · 30 days ago
As a Member of the Technical Staff on the RTL Design team at Architect, you’ll own the AI-driven microarchitecture and RTL design of the on-chip interconnect fabric and high-speed I/O data…
- Full-time
- Lead / Staff
- 5+ years
- SystemVerilog
- AMBA AXI
- CXL
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