Design Verification Engineer
- Pay
- $200,000 – $300,000 per year
- Location
- Mountain View, CA · On-site
- Job type
- Full-time
- Level
- Senior
- Experience
- 5+ years
- Listed
- 30 days ago
Skills & highlights for this role
- UVM methodology
- SoC verification
- pre-silicon verification
- emulation testing
Also useful
- RISC-V
- formal verification
- Palladium
- Veloce
Stated benefits & perks
- Medical
- Dental
- Vision
- 401k
- Pto
About the role
We're looking for an experienced Design Verification engineer with at least 5 years of pre-silicon verification experience in end to end verification for complex IP, subsystems, and/or SoC system level verification from plan to functional closure. This is a senior individual-contributor role and you'll partner closely with our HW-design and software teams, driving DensityAI's AI accelerator program from first silicon through scale-out.
What you'll do
- Own an entire testing domain based on your expertise
- Develop end to end testing strategy from IP to SOC-level and to emulation for our AI accelerator silicon
- Use and develop AI-assisted tool flows to accelerate verification and emulation timeline
What we're looking for
- 5+ years of experience in one or more of the following:
- Block Level/Sub System Verification
- CPU Subsystem/IP integration
- SoC/full-chip Verification
- Emulation testing
- DMA/NoC Verification
- Multi-SoC/Die to Die protocol verification
- Debug for functional closure of complex design or SOCs
- Proven records on end-to-end pre-silicon verification ownership and deliverables
- Strong Interest in optimizing Verification techniques and life cycle using the latest agentic/AI assisted flows
- Exceptional abilities in analyzing and understanding specification from both hardware and software perspectives
- Well-versed in UVM methodology and testbench architecture
- Ability to define clear goals and milestones to meet aggressive timelines and quickly adapt to a dynamic design life cycle
- Self driven and passionate, with a strong sense of respectful team collaboration
- Flexible Mindset to jump in and contribute to multiple domains within verification as needed
- (Optional) RISC-V, formal verification, emulation platforms (Palladium, Veloce, or equivalent), or post-silicon bring-up
Compensation
Final offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO.
Visa Sponsorship
DensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas, and we welcome applicants on F-1 OPT and STEM-OPT. Work authorization is required at start; we provide immigration support to secure or transfer status.
Export Controls
Aspects of this role may involve access to information subject to U.S. export controls (EAR/ITAR). We may discuss licensing or scope adjustments during the interview.
Equal opportunity and legal notices
DensityAI is an Equal Opportunity Employer. We do not discriminate on the basis of race, color, religious creed, national origin, ancestry, physical or mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, age (40+), sexual orientation, military or veteran status, pregnancy, or any other status protected by law. We comply with the California CROWN Act and provide reasonable accommodations on request.
Full compensation packages are based on candidate experience and relevant certifications.
California pay range $200,000—$300,000 USD
From DensityAI's careers page, first listed on Rolev.ai on October 10, 2026. Rolev.ai is not the employer.
How Rolev.ai helps with this application
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Common questions
What is the salary for the Design Verification Engineer role at DensityAI?
The Design Verification Engineer posting at DensityAI states compensation of $200,000 – $300,000 per year. It is listed as a full-time position. Final pay may depend on location, experience, and interview evaluation on DensityAI's official career site.
Where is the Design Verification Engineer job at DensityAI located?
This Design Verification Engineer position at DensityAI is located in Mountain View, CA (On-site). Always check DensityAI's application page for specific state eligibility or relocation policies.
What qualifications are required for Design Verification Engineer at DensityAI?
For the Design Verification Engineer role, DensityAI highlights 5+ years of relevant experience; experience with UVM methodology, SoC verification, pre-silicon verification, emulation testing. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the Design Verification Engineer position at DensityAI?
This listing links directly to DensityAI's Greenhouse application page. You can apply directly on DensityAI's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the Greenhouse application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.