FPGA Design Engineer (MTD, Tualatin, OR)
- Pay
- $123,100 – $196,900 per year
- Location
- Tualatin, OR
- Listed
- 2 days ago
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Fpga
- Design Engineer (MTD, Tualatin, OR)
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- Date: Nov 10, 2026
- Location: Tualatin, OR, US
Our Purpose
TERADYNE, where experience meets innovation and driving excellence in every connection. We are fueled by creativity and diversity of thought and in our workforce. Our employees are supported to innovate and learn something new every day.
We cultivate a culture of inclusion for all employees that respects their individual strengths, views, and experiences. We believe that our differences enable us to be a better team – one that makes better decisions, drives innovation and delivers better business results.
Opportunity Overview
Teradyne’s Memory Test Division (MTD) seeks a motivated and technically driven FPGA Engineer to support the development of our growing portfolio of cutting-edge memory test solutions.
MTD creates advanced solutions for complex testing applications, driving innovation through creativity and diverse perspectives. Our test instrumentation supports the world’s most advanced memory technologies, combining state-of-the-art digital and analog designs, cutting-edge ASIC/FPGA technologies, liquid cooling, and high-performance signal delivery.
We are looking for an FPGA Design Engineer with exceptional technical skills and a strong desire to collaborate on team-oriented projects. Success in this role means delivering high-quality, reliable products to market quickly. If you are excited to join a dynamic, global team, Teradyne may be the place for you!
- Architect and implement FPGA solutions to support next generation Flash and DRAM test instrumentation.
- Provide technical guidance to junior engineers
- Turn abstract concepts and customer requirements into reliable, extensible, and supportable designs.
- Assist in the maintenance and extension of existing FPGA designs to support quality improvement and emerging customer requirements.
- Maintain schedule commitments and deliver high quality end products.
- Occasional travel may be required.
All About You
- We seek individuals who share our passion.
- Our commitment to customer success drives us to go the extra mile.
- If you’re ready to join us in this mission, take a closer look at the minimum criteria for the position.
Bachelor’s Degree or equivalent in Electrical Engineering or a closely related field with a minimum of 5 years of relevant work experience, or Master’s Degree or equivalent with a minimum of 3 years of relevant work experience.
- Experience with Digital Design and Architecture
- RTL coding, synthesis, timing closure and lab validation
- Experience with Static Timing Analysis of ASICs or FPGAs
- Experience with digital simulation testbench creation
- Experience with C or C++
Familiarity with lab equipment such as oscilloscopes, power supplies and waveform generators.
Addiiotnal Desired Skills
Fpga
- Transceiver based design experience
- Experience with DRAM and Flash Memory interfaces
- Experience with Altera/AMD FPGA tool flows
- Proficiency with Verilog HDL Language
- Familiarity with UVM Methodology
- Scripting languages experience
- Linux and Windows operating systems experience
- Familiarity with ATE instrumentation
Compensation
The base salary range for this role is $123,100 - $196,900. This range is a good faith estimate, and the amount of base salary will correspond with experience and skill set. This range can also fluctuate depending on demand and location.
Incentive Plan
This job is eligible for discretionary bonus(es) based on financial performance.
Benefits
Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation & holidays, tuition assistance programs, and more. Please click here to see details.
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Company
Teradyne
We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together,
Teradyne companies deliver manufacturing automation across industries and applications around the world!
We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive.
From Teradyne's careers page, first listed on Rolev.ai on November 11, 2026. Rolev.ai is not the employer.
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All Teradyne jobsCommon questions
What is the salary for the FPGA Design Engineer (MTD, Tualatin, OR) role at Teradyne?
The FPGA Design Engineer (MTD, Tualatin, OR) posting at Teradyne states compensation of $123,100 – $196,900 per year. Final pay may depend on location, experience, and interview evaluation on Teradyne's official career site.
Where is the FPGA Design Engineer (MTD, Tualatin, OR) job at Teradyne located?
This FPGA Design Engineer (MTD, Tualatin, OR) position at Teradyne is located in Tualatin, OR. Always check Teradyne's application page for specific state eligibility or relocation policies.
How do I apply for the FPGA Design Engineer (MTD, Tualatin, OR) position at Teradyne?
This listing links directly to Teradyne's application page. You can apply directly on Teradyne's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.