Physical Design Engineer
- Location
- Palo Alto, CA · On-site
- Job type
- Full-time
- Level
- Senior
- Experience
- 5+ years
- Listed
- 21 days ago
Skills & highlights for this role
- physical design
- Innovus
- Fusion Compiler
- static timing analysis
Also useful
- Tcl
- Python
- clock tree synthesis
About this Role
You'll take designs from netlist to GDSII. You'll own floorplanning through closure on real silicon programs with leading semiconductor companies while helping Voltai's AI learn how expert physical designers make decisions.
What You’ll Do
- Own block-level and full-chip physical implementation: floorplanning, placement, clock tree synthesis, and routing.
- Drive timing, power, and congestion closure with synthesis and STA teams.
- Close physical verification (DRC/LVS) and power integrity (IR drop, EM) for signoff.
- Build and improve place-and-route flows and automation.
- Evaluate AI-generated floorplans and implementation decisions, and help define what good looks like.
- Work directly with customer teams on implementation challenges.
What We’re Looking For
- 5+ years of physical design experience with multiple production tapeouts.
- Deep experience with Innovus or Fusion Compiler/ICC2.
- Strong understanding of timing closure, clock tree synthesis, and power distribution networks.
- Experience at advanced nodes (7nm and below).
- Strong Tcl and Python scripting.
Bonus Points
- Full-chip integration or hierarchical design experience.
- Experience with high-speed or low-power designs.
- Interest in AI or machine learning applied to physical design.
About Voltai
Voltai is developing world models, and agents to learn, evaluate, plan, experiment, and interact with the physical world. We are starting out with understanding and building hardware; electronics systems and semiconductors where AI can design and create beyond human cognitive limits.
About the Team
Backed by Silicon Valley’s top investors, Stanford University, and CEOs/Presidents of Google, AMD, Broadcom, Marvell, etc. We are a team of previous Stanford professors, SAIL researchers, Olympiad medalists (IPhO, IOI, etc.), the inventors of IC3 and the Murphi verification system, CTOs of Synopsys & GlobalFoundries, Head of Sales & CRO of Cadence, former US Secretary of Defense, National Security Advisor, and Senior Foreign-Policy Advisor to four US presidents.
From Voltai's careers page, first listed on Rolev.ai on October 19, 2026. Rolev.ai is not the employer.
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Common questions
Where is the Physical Design Engineer job at Voltai located?
This Physical Design Engineer position at Voltai is located in Palo Alto, CA (On-site). Always check Voltai's application page for specific state eligibility or relocation policies.
What qualifications are required for Physical Design Engineer at Voltai?
For the Physical Design Engineer role, Voltai highlights 5+ years of relevant experience; experience with physical design, Innovus, Fusion Compiler, static timing analysis. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the Physical Design Engineer position at Voltai?
This listing links directly to Voltai's Ashby application page. You can apply directly on Voltai's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the Ashby application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.