Voltai Jobs
Open positions at Voltai, newest first. Each listing links to the company's own application page.
- Open positions
- 32
Newest Voltai openings
Palo Alto, CA (On-site) · 20 days ago
You'll own the path from RTL to a timing-clean netlist.
- Full-time
- Senior
- 5+ years
- Design Compiler
- PrimeTime
- static timing analysis
Palo Alto, CA (On-site) · 20 days ago
You'll make sure first silicon works.
- Full-time
- Senior
- 5+ years
- post-silicon validation
- JTAG
- oscilloscope debugging
Low-Power Design Engineer
On-sitePalo Alto, CA (On-site) · 20 days ago
You'll own power intent from architecture through signoff.
- Full-time
- Senior
- 5+ years
- UPF power intent
- low-power verification
- CDC/RDC analysis
Chip Architect
On-sitePalo Alto, CA (On-site) · 20 days ago
You'll define the architecture of complex SoCs and subsystems, from performance models to the specs that RTL teams build against.
- Full-time
- Lead / Staff
- 8+ years
- SoC architecture
- memory systems
- interconnects
Palo Alto, CA (On-site) · 20 days ago
You'll make sure the chips we work on can be tested in manufacturing and in the field.
- Full-time
- Senior
- 5+ years
- scan insertion
- ATPG
- MBIST
RTL Design Engineer
On-sitePalo Alto, CA (On-site) · 20 days ago
You'll design and own RTL for production silicon, from microarchitecture to signoff-ready code.
- Full-time
- Senior
- 5+ years
- RTL design
- SystemVerilog
- microarchitecture
Palo Alto, CA (On-site) · 20 days ago
You'll build the infrastructure that connects the whole chip design flow.
- Full-time
- Senior
- 5+ years
- Synopsys tools
- Cadence tools
- Python
Palo Alto, CA (On-site) · 20 days ago
You'll bring designs to life before silicon exists.
- Full-time
- Senior
- 5+ years
- emulation
- FPGA prototyping
- SystemVerilog
Physical Design Engineer
On-sitePalo Alto, CA (On-site) · 20 days ago
You'll take designs from netlist to GDSII.
- Full-time
- Senior
- 5+ years
- physical design
- Innovus
- Fusion Compiler
Palo Alto, CA (On-site) · 20 days ago
You'll be the last line of defense before tapeout.
- Full-time
- Senior
- 5+ years
- Calibre
- IC Validator
- DRC/LVS verification
Palo Alto, CA (Hybrid) · 22 days ago
This role is on-site in our San Francisco office (Atherton near Palo Alto) or hybrid in our New York City office.
- Full-time
- Senior
- 5+ years
- Python or TypeScript
- Docker
- AWS
BizOps
On-sitePalo Alto, CA (On-site) · 22 days ago
As BizOps, you’ll play a vital role in ensuring our day-to-day operations run smoothly.
- Full-time
- Mid-level
- KPI reporting
- process improvement
- cross-functional collaboration
Formal Verification Engineer
On-sitePalo Alto, CA (On-site) · 22 days ago
In this role, you’ll build formal proofs of design correctness using model checking, property verification, and equivalence analysis.
- Full-time
- Mid-level
- 5+ years
- formal verification
- JasperGold
- SystemVerilog Assertions (SVA)
Palo Alto, CA (On-site) · 22 days ago
You will train frontier models to become highly knowledgeable semiconductor design and verification experts that serve as the foundation for reinforcement learning and automated chip…
- Full-time
- Mid-level
- LLM training
- synthetic data generation
- model distillation
Enterprise Program Manager
On-sitePalo Alto, CA (On-site) · 22 days ago
Manage customer requests and collaborate with engineering teams to ensure delivery across multiple products and smooth onboarding of products.
- Full-time
- Mid-level
- 3+ years
- cross-functional program management
- customer-facing delivery
- risk and roadblock management
Palo Alto, CA (On-site) · 22 days ago
In this role, you will post-train frontier models to autonomously perform complex tasks across the semiconductor design and verification pipeline. Models you train will propose and…
- Full-time
- Mid-level
- reinforcement learning
- LLM post-training
- RTL verification
Palo Alto, CA (On-site) · 22 days ago
In this role, you’ll develop new formal verification methods to enable formal proofs of design correctness using model checking, property verification, and equivalence analysis.
- Full-time
- Senior
- 5+ years
- formal verification
- model checking
- SystemVerilog Assertions (SVA)
Palo Alto, CA (On-site) · 22 days ago
This role is on-site in our San Francisco office (Atherton near Palo Alto) or hybrid in our New York City office.
- Full-time
- Senior
- 5+ years
- Docker
- cloud infrastructure (AWS, Azure, GCP)
- infrastructure as code
Engineering Manager
On-sitePalo Alto, CA (On-site) · 22 days ago
Lead and manage a team of engineers through weekly sprint cycles and delivery milestones
- Full-time
- Lead / Staff
- 2+ years
- agile methodologies
- sprint planning
- engineering management
Palo Alto, CA (Hybrid) · 22 days ago
This role is on-site in our San Francisco office (Atherton near Palo Alto) or hybrid in our New York City office.
- Full-time
- Senior
- 5+ years
- RAG
- Docker
- AWS
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