Research Engineer - Mid-Training
- Location
- Palo Alto, CA · On-site
- Job type
- Full-time
- Level
- Mid-level
- Listed
- 22 days ago
Skills & highlights for this role
- LLM training
- synthetic data generation
- model distillation
- RTL
- evaluation design
Also useful
- semiconductor design
- distributed GPU training
- reinforcement learning
Mid Training
You will train frontier models to become highly knowledgeable semiconductor design and verification experts that serve as the foundation for reinforcement learning and automated chip development. You will develop methods for generating and curating synthetic design data, performing model distillation, and enabling continual learning at scale.
You will work closely with hardware engineers, RL researchers, and verification specialists to create evals that guide design data quality and model improvement. You will collaborate with compute engineers to scale efficient training across thousands of GPUs and RL environments. You will build high-performance tools to investigate how data and simulation shape model-driven design intelligence.
You might thrive in this role if you have experience with
- Training LLMs or foundation models on semiconductor design and verification corpora (e.g., RTL, netlists, PDKs, simulation logs)
- Modeling design scaling laws and optimizing compute budgets for chip-design-specific workloads
- Generating large-scale synthetic design data (e.g., RTL variants, testbenches, verification traces)
- Building evals that correlate with downstream design metrics (e.g., timing closure, power, area, verification coverage)
About Voltai
Voltai is developing world models, and agents to learn, evaluate, plan, experiment, and interact with the physical world. We are starting out with understanding and building hardware; electronics systems and semiconductors where AI can design and create beyond human cognitive limits.
About the Team
Backed by Silicon Valley’s top investors, Stanford University, and CEOs/Presidents of Google, AMD, Broadcom, Marvell, etc. We are a team of previous Stanford professors, SAIL researchers, Olympiad medalists (IPhO, IOI, etc.), CTOs of Synopsys & GlobalFoundries, Head of Sales & CRO of Cadence, former US Secretary of Defense, National Security Advisor, and Senior Foreign-Policy Advisor to four US presidents.
From Voltai's careers page, first listed on Rolev.ai on October 17, 2026. Rolev.ai is not the employer.
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Common questions
Where is the Research Engineer - Mid-Training job at Voltai located?
This Research Engineer - Mid-Training position at Voltai is located in Palo Alto, CA (On-site). Always check Voltai's application page for specific state eligibility or relocation policies.
What qualifications are required for Research Engineer - Mid-Training at Voltai?
For the Research Engineer - Mid-Training role, Voltai highlights experience with LLM training, synthetic data generation, model distillation, RTL, evaluation design. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the Research Engineer - Mid-Training position at Voltai?
This listing links directly to Voltai's Ashby application page. You can apply directly on Voltai's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the Ashby application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.