Post-Silicon Validation Engineer
- Location
- Palo Alto, CA · On-site
- Job type
- Full-time
- Level
- Senior
- Experience
- 5+ years
- Listed
- 21 days ago
Skills & highlights for this role
- post-silicon validation
- JTAG
- oscilloscope debugging
- logic analyzer
Also useful
- PCIe
- DDR
- Ethernet
- C/C++ test automation
- silicon characterization
About this Role
You'll make sure first silicon works. You'll own bring-up and validation on real silicon programs with leading semiconductor companies while helping Voltai's AI learn from what happens after tapeout.
What You’ll Do
- Plan and execute post-silicon bring-up and validation for SoCs and IP.
- Develop validation content, test plans, and automated test infrastructure.
- Debug silicon failures across logic, timing, power, and system interactions.
- Correlate silicon results with pre-silicon simulation, emulation, and formal results.
- Work with design, DFT, and product engineering teams to drive root cause and fixes.
- Capture silicon learnings that feed back into Voltai's models and verification flows.
What We’re Looking For
- 5+ years of post-silicon validation or bring-up experience.
- Hands-on lab experience with oscilloscopes, logic analyzers, JTAG, and debug tools.
- Strong Python and C/C++ for test automation.
- Experience with high-speed interfaces (PCIe, DDR, Ethernet, or similar).
- Systematic debug skills across hardware and software.
Bonus Points
- Experience with silicon characterization and yield.
- Background in pre-silicon verification.
- Interest in AI-assisted design tools.
About Voltai
Voltai is developing world models, and agents to learn, evaluate, plan, experiment, and interact with the physical world. We are starting out with understanding and building hardware; electronics systems and semiconductors where AI can design and create beyond human cognitive limits.
About the Team
Backed by Silicon Valley’s top investors, Stanford University, and CEOs/Presidents of Google, AMD, Broadcom, Marvell, etc. We are a team of previous Stanford professors, SAIL researchers, Olympiad medalists (IPhO, IOI, etc.), the inventors of IC3 and the Murphi verification system, CTOs of Synopsys & GlobalFoundries, Head of Sales & CRO of Cadence, former US Secretary of Defense, National Security Advisor, and Senior Foreign-Policy Advisor to four US presidents.
From Voltai's careers page, first listed on Rolev.ai on October 19, 2026. Rolev.ai is not the employer.
How Rolev.ai helps with this application
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Common questions
Where is the Post-Silicon Validation Engineer job at Voltai located?
This Post-Silicon Validation Engineer position at Voltai is located in Palo Alto, CA (On-site). Always check Voltai's application page for specific state eligibility or relocation policies.
What qualifications are required for Post-Silicon Validation Engineer at Voltai?
For the Post-Silicon Validation Engineer role, Voltai highlights 5+ years of relevant experience; experience with post-silicon validation, JTAG, oscilloscope debugging, logic analyzer. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the Post-Silicon Validation Engineer position at Voltai?
This listing links directly to Voltai's Ashby application page. You can apply directly on Voltai's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the Ashby application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.