Research Engineer - Post-Training
- Location
- Palo Alto, CA · On-site
- Job type
- Full-time
- Level
- Mid-level
- Listed
- 23 days ago
Skills & highlights for this role
- reinforcement learning
- LLM post-training
- RTL verification
Also useful
- simulation
- reward function design
- benchmark construction
Post-Training
In this role, you will post-train frontier models to autonomously perform complex tasks across the semiconductor design and verification pipeline. Models you train will propose and optimize chip architectures, generate and refine RTL code, run simulations, identify verification gaps, and iteratively improve designs - accelerating the pace of semiconductor innovation.
You will collaborate with leading experts in hardware design, verification, and computer architecture to design rich reinforcement learning environments that capture the intricacies of chip design workflows. You’ll develop structured reward functions, scaling strategies, and evaluation frameworks that push models toward higher reliability, efficiency, and creativity in semiconductor reasoning.
Your work will directly advance the goal of creating AI systems capable of reasoning about, designing, and verifying next-generation silicon systems.
You might thrive in this role if you have experience with
- Creating and scaling RL environments for LLMs or multimodal agents
- Building high-quality evaluation datasets and benchmarks for complex reasoning or design tasks
- Working closely with domain experts in hardware and verification to define evaluation metrics, constraints, and simulation conditions
- Designing reward functions and feedback pipelines that balance correctness, performance, and design efficiency
- Running large-scale RL fine-tuning or post-training experiments for frontier models
- Applying reinforcement learning or curriculum learning to structured reasoning or symbolic domains
About Voltai
Voltai is developing world models, and agents to learn, evaluate, plan, experiment, and interact with the physical world. We are starting out with understanding and building hardware; electronics systems and semiconductors where AI can design and create beyond human cognitive limits.
About the Team
Backed by Silicon Valley’s top investors, Stanford University, and CEOs/Presidents of Google, AMD, Broadcom, Marvell, etc. We are a team of previous Stanford professors, SAIL researchers, Olympiad medalists (IPhO, IOI, etc.), CTOs of Synopsys & GlobalFoundries, Head of Sales & CRO of Cadence, former US Secretary of Defense, National Security Advisor, and Senior Foreign-Policy Advisor to four US presidents.
From Voltai's careers page, first listed on Rolev.ai on October 17, 2026. Rolev.ai is not the employer.
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Common questions
Where is the Research Engineer - Post-Training job at Voltai located?
This Research Engineer - Post-Training position at Voltai is located in Palo Alto, CA (On-site). Always check Voltai's application page for specific state eligibility or relocation policies.
What qualifications are required for Research Engineer - Post-Training at Voltai?
For the Research Engineer - Post-Training role, Voltai highlights experience with reinforcement learning, LLM post-training, RTL verification. Rolev.ai can score your existing resume against these requirements and show any skill gaps before you apply.
How do I apply for the Research Engineer - Post-Training position at Voltai?
This listing links directly to Voltai's Ashby application page. You can apply directly on Voltai's site, or use Rolev.ai to check your resume fit, generate a zero-hallucination tailored resume and cover letter for this posting, and autofill the Ashby application form in 1 click with the Rolev.ai Chrome extension. You always review the form and press Submit yourself.