Electronics Engineer Jobs - Page 21
Electronics Engineer openings from employers' own career sites, newest first. Rolev.ai ranks them against your resume and tailors it to each posting.
- Open positions
- 605
- Median advertised pay
- $190,000 per year
- Most openings in
- San Jose, CA
Newest Electronics Engineer openings
DFT Engineer
$100k – $500k/yrTenstorrent · Santa Clara, CA (Remote) · 30 days ago
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm…
- Full-time
- Lead / Staff
- 10+ years
- DFT implementation
- scan chains
- memory BIST
Staff Engineer,Post-Silicon Validation
$100k – $500k/yrTenstorrent · Austin, TX (Hybrid) · 30 days ago
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm…
- Full-time
- Director
- 5+ years
- post-silicon validation
- SoC bring-up
- RISC-V privilege modes
Chiplet Physical Design Engineer
$100k – $500k/yrTenstorrent · Santa Clara, CA (Remote) · 30 days ago
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm…
- Full-time
- Director
- 10+ years
- Synopsys
- Cadence
- timing closure
Tenstorrent · Austin, TX (Hybrid) · 30 days ago
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm…
- Full-time
- Senior
- 5+ years
- Fusion Compiler
- RTL-to-GDS
- static timing analysis
Sr. SRAM Layout Design Engineer supporting Nvidia
$110 – $120/hrSustainable Talent · Santa Clara, CA (On-site) · 30 days ago
Manage the complete custom layout process for SRAM (Static Random-Access Memory) bitcell arrays, memory periphery, test structures, and memory macros in advanced CMOS technologies.
- Contract
- Director
- 5+ years
- Cadence Virtuoso
- Calibre DRC/LVS
- ICV
Senior Cyber RF Hardware Engineer
$134k – $184k/yrSTR · Woburn, MA (On-site) · 30 days ago
STR's Cyber Division is hiring a Senior Cyber RF Hardware Engineer who will leverage their RF, analog/mixed signal and system test skills to contribute to a multi-disciplinary team engaged…
- Full-time
- Senior
- 5+ years
- RF circuit design
- analog and mixed-signal design
- system test
STR · Woburn, MA (On-site) · 30 days ago
We are seeking a Principal Investigator (PI) to lead cutting-edge research and development in advanced undersea sensing and robotic systems.
- Full-time
- Executive
- 5+ years
- acoustic signal processing
- systems engineering
- embedded systems
Lead Signal Processing Researcher
$173k – $216k/yrSTR · Woburn, MA (On-site) · 30 days ago
The Sensors Division at STR focuses on technology development for advanced sensor systems and platforms in support of national security requirements. Our particular focus areas include…
- Full-time
- Lead / Staff
- 3+ years
- Matlab
- Python
- radar architectures
STR · Arlington, VA (On-site) · 30 days ago
We are seeking an experienced RF Systems Inte
- Full-time
- Lead / Staff
- 6+ years
- RF test and measurement
- RF systems integration
- Matlab
Senior FPGA Reverse Engineer
$138k – $189k/yrSTR · Woburn, MA (On-site) · 30 days ago
STR's Cyber Division is hiring a Senior FPGA Reverse Engineer who will leverage their digital hardware design background to work within a multi-disciplinary team solving unique problems…
- Full-time
- Senior
- 5+ years
- Verilog
- SystemVerilog
- VHDL
Lead Signal Processing Researcher
$173k – $216k/yrSTR · Atlanta, GA (On-site) · 30 days ago
The Sensors Division at STR focuses on technology development for advanced sensor systems and platforms in support of national security requirements. Our particular focus areas include…
- Full-time
- Lead / Staff
- 3+ years
- MATLAB
- Python
- Simulink
Signal Integrity Engineer Intern
$35 – $55/hrAstera Labs · San Jose, CA (On-site) · 30 days ago
Location: San Jose, California, United States
- Internship
- Entry level
- signal integrity analysis
- S-parameter extraction
- PCB design
Product Applications Engineer NCG (Sco 1)
$140k – $150k/yrAstera Labs · San Jose, CA (On-site) · 30 days ago
As an Astera Labs Product Applications Engineer, you will tackle complex debugging challenges that span from low-level firmware configuration to PCB hardware design and full system-level…
- Full-time
- Entry level
- C firmware
- Python
- PCIe
Design Engineering Intern (CCE2)
$35 – $55/hrAstera Labs · San Jose, CA (On-site) · 30 days ago
Join the CCE2 Design Engineering team and gain hands-on experience developing digital logic for advanced connectivity ASICs.
- Internship
- Entry level
- Verilog
- SystemVerilog
- digital logic design
Digital Design Engineering Intern
$35 – $55/hrAstera Labs · San Jose, CA (On-site) · 30 days ago
Astera Labs is seeking a Digital Design Intern to contribute to the development of ASIC and digital hardware blocks.
- Internship
- Entry level
- Verilog
- SystemVerilog
- RTL design
Emulation Engineering Intern
$35 – $55/hrAstera Labs · San Jose, CA (On-site) · 30 days ago
Astera Labs is seeking an Emulation Engineering Intern to help enable fast, repeatable pre-silicon validation of complex ASIC and system designs.
- Internship
- Entry level
- RTL
- SystemVerilog
- Python
Analog Mixed Signal Engineer Intern
$47 – $70/hrAstera Labs · San Jose, CA (On-site) · 30 days ago
As an Analog/Mixed-Signal IC Design Engineer Intern, you will be part of a key team designing sophisticated advanced node CMOS products.
- Internship
- Entry level
- analog mixed-signal circuit design
- ADC/DAC data converters
- PLL design
Senior ECAD Librarian
$100k – $140k/yrHumanoid · Boston, MA (On-site) · 30 days ago
Here at Humanoid, we believe in a future where robots amplify human potential.
- Full-time
- Director
- Altium Designer
- PCB footprint design
- schematic library management
Muon Space · San Jose, CA (Hybrid) · 30 days ago
Muon Space is seeking a Senior FPGA Engineer specialized in onboard networking, cryptography and security to design the network fabric and security architecture of our next-generation…
- Full-time
- Senior
- FPGA design
- RTL
- Ethernet PHY/MAC integration
FPGA Design Engineer
$110k – $170k/yrArista Networks · Santa Clara, CA (On-site) · 30 days ago
You will work closely with cross-functional hardware, software, and manufacturing engineering teams to innovate new system architectures and drive FPGA development from initial concept to…
- Full-time
- Senior
- 5+ years
- Verilog
- SystemVerilog
- FPGA design flow
How Rolev.ai helps with Electronics Engineer jobs
Rolev.ai is a job search and application tool for US job seekers. It shows which Electronics Engineer jobs fit your resume, tailors your resume to each posting, and prepares the application for you to review.
See how you fit
Openings from employer career sites are ranked against your whole resume—and searchable inside Claude, ChatGPT, and Cursor via Rolev.ai MCP.
Tailor without inventing
Every change to your resume is checked against your original. New experience goes in only with your yes—zero fabricated claims.
Draft the full kit
Tailored and Full Match resumes, role-specific cover letters, and answers to employer screening questions are prepared in seconds.
1-Click Extension Autofill
The Chrome extension fills the employer's Greenhouse, Workday, Lever, or Ashby form in 1 click. You review it and press Submit.
Common questions
How much does a Electronics Engineer make in the US?
Based on 239 Electronics Engineer postings in the US that state pay, the median advertised salary is $190,000 per year. Individual offers vary with experience, employer and location.
Does Rolev.ai apply to these jobs for me?
No. Rolev.ai tailors your resume and the Chrome extension fills the employer's form, and you review it and press Submit yourself.
Where do these listings come from?
From employers' public career sites. Each listing links to the employer's own application page.